VPC3230D datasheet(44/78 Pages) MICRONAS

44 / 78 page

VPC 323xD, VPC 324xD

ADVANCE INFORMATION

Micronas

Scaler Control Register

h’40

scaler mode register

bit[1:0]

scaler mode

linear scaling mode

nonlinear scaling mode, ’panorama’

nonlinear scaling mode, ’waterglass’

3reserved

bit[2]

reserved, set to 0

bit[3]

color mode select

0/1

4:2:2 mode / 4:1:1 mode

bit[4]

scaler bypass

bit[5]

reserved, set to 0

bit[6]

luma output format

ITU-R luma output format (16–240)

CVBS output format

bit[7]

chroma output format

0/1

ITU-R (offset binary) / signed

bit[10:8] reserved, set to 0

bit[11]

scaler update command, when the registers are

updated the bit is set to 1

0SCMODE

PANO

S411

BYE

YOF

COF

h’41

pip control register

bit[1:0]

horizontal downsampling

no downsampling

downsampling by 2

downsampling by 4

downsampling by 8

bit[3:2]

vertical compression for PIP

compression by 2

compression by 3

compression by 4

compression by 6

bit[4]

vertical filter enable

bit[5]

interlace offset for vertical filter (NTSC mode only)

start in line 283 of 2nd field (ITUR 656 spec)

start in line 282 of 2nd field (NTSC spec)

this register is updated when the scaler mode register is written

0SCPIP

DOWNSAMP

PIPSIZE

PIPE

INTERLACE_OFF

h’42

active video length for 1H-FIFO

bit[11:0] length in pixels

D3000 mode (1296/h)1080

LLC mode (864/h)720

this register is updated when the scaler mode register is written

1080

FFLIM

h’43

scaler1 coefficient: This scaler compresses the signal.

For compression by a factor c, the value c*1024 is required.

bit[11:0]

allowed values from 1024... 4095

This register is updated when the scaler mode register is written.

1024

SCINC1

h’44

scaler2 coefficient: This scaler expands the signal.

For expansion by a factor c, the value 1/c*1024 is required.

bit[11:0]

allowed values from 256..1024

This register is updated when the scaler mode register is written.

1024

SCINC2

h’45

scaler1/2 nonlinear scaling coefficient

This register is updated when the scaler mode register is written.

SCINC

FP Sub-

address

Function

Default

Name

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