ADV7181BBCPZ datasheet(25/96 Pages) AD

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ADV7181B

Rev. 0 | Page 25 of 96

The following sections describe the I2C signals that can be used

to influence the behavior of the clamping block.

Previous revisions of the ADV7181B had controls (FACL/FICL,

fast and fine clamp length) to allow configuration of the length

for which the coarse (fast) and fine current sources are switched

on. These controls were removed on the ADV7181-FT and

replaced by an adaptive scheme.

CCLEN Current Clamp Enable, Address 0x14 [4]

The current clamp enable bit allows the user to switch off the

current sources in the analog front end altogether. This may be

useful if the incoming analog video signal is clamped externally.

When CCLEN is 0, the current sources are switched off.

When CCLEN is 1 (default), the current sources are enabled.

DCT[1:0] Digital Clamp Timing, Address 0x15 [6:5]

The Clamp Timing register determines the time constant of the

digital fine clamp circuitry. It is important to realize that the

digital fine clamp reacts very quickly since it is supposed to

immediately correct any residual dc level error for the active

line. The time constant of the digital fine clamp must be much

quicker than the one from the analog blocks.

By default, the time constant of the digital fine clamp is adjusted

dynamically to suit the currently connected input signal.

Table 27. DCT Function

DCT[1:0]

Description

Slow (TC = 1 sec).

Medium (TC = 0.5 sec).

10 (default)

Fast (TC = 0.1 sec).

Determined by ADV7181B, depending on the

input video parameters.

DCFE Digital Clamp Freeze Enable, Address 0x15 [4]

This register bit allows the user to freeze the digital clamp loop

at any time. It is intended for users who would like to do their

own clamping. Users should disable the current sources for

analog clamping via the appropriate register bits, wait until the

digital clamp loop settles, and then freeze it via the DCFE bit.

When DCFE to 0 (default), the digital clamp is operational .

When DCFE is 1, the digital clamp loop is frozen.

LUMA FILTER

Data from the digital fine clamp block is processed by three sets

of filters. Note that the data format at this point is CVBS for

CVBS input or luma only for Y/C and YPrPb input formats.

•

Luma antialias filter (YAA). The ADV7181B receives video

at a rate of 27 MHz. (In the case of 4× oversampled video,

the ADCs sample at 54 MHz, and the first decimation is

performed inside the DPP filters. Therefore, the data rate

into the ADV7181B is always 27 MHz.) The ITU-R BT.601

recommends a sampling frequency of 13.5 MHz. The luma

antialias filter decimates the oversampled video using a

high quality, linear phase, low-pass filter that preserves the

luma signal while at the same time attenuating out-of-band

components. The luma antialias filter (YAA) has a fixed

response.

•

Luma shaping filters (YSH). The shaping filter block is a

programmable low-pass filter with a wide variety of

responses. It can be used to selectively reduce the luma

video signal bandwidth (needed prior to scaling, for

example). For some video sources that contain high

frequency noise, reducing the bandwidth of the luma signal

improves visual picture quality. A follow-on video

compression stage may work more efficiently if the video is

low-pass filtered.

The ADV7181B has two responses for the shaping filter:

one that is used for good quality CVBS, component, and S-

VHS type sources, and a second for nonstandard CVBS

signals.

The YSH filter responses also include a set of notches for

PAL and NTSC. However, it is recommended to use the

comb filters for YC separation.

•

Digital resampling filter. This block is used to allow dynamic

resampling of the video signal to alter parameters such as

the time base of a line of video. Fundamentally, the resam-

pler is a set of low-pass filters. The actual response is chosen

by the system with no requirement for user intervention.

Figure 11 through Figure 14 show the overall response of all

filters together. Unless otherwise noted, the filters are set into a

typical wideband mode.

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