HT46C64 datasheet(27/47 Pages) HOLTEK

27 / 47 page

HT46R64/HT46C64

Rev. 1.40

September 21, 2004

The RTCC register definitions are listed below.

Bit No.

Label

Read/Write

Reset

Function

RTCC

(09H)

0~2

RT0~RT2

R/W

8 to 1 multiplexer control inputs to select the real clock

prescaler output

LVDC

R/W

LVD enable/disable (1/0)

QOSC

R/W

32768Hz OSC quick start-up oscillating

0/1: quickly/slowly start

LVDO

LVD detection output (1/0)

1: low voltage detected

6~7

¾¾

Unused bit, read as

²0²

Options

The following shows the options in the device. All these options should be defined in order to ensure proper functioning

system.

Options

OSC type selection.

This option is to decide if an RC or crystal or 32768Hz crystal oscillator is chosen as system clock.

WDT, RTC and time base clock source selection.

There are three types of selections: system clock/4 or RTC OSC or WDT OSC.

WDT enable/disable selection.

WDT can be enabled or disabled by option.

WDT time-out period selection.

There are four types of selection: WDT clock source divided by 2

12/f

S~2

13/f

S,2

13/f

S~2

14/f

S,2

14/f

S~2

15/f

S or

15/f

S~2

16/f

CLR WDT times selection.

This option defines the method to clear the WDT by instruction.

²One time² means that the ²CLR WDT² can clear the

WDT.

²Two times² means only if both of the ²CLR WDT1² and ²CLR WDT2² have been executed, the WDT can be

cleared.

V D D

5 . 5 V

V L V R

0 . 9 V

0 V

R e s e t S i g n a l

R e s e t

* 1

* 2

N o r m a l O p e r a t i o n

R e s e t

L V R D e t e c t V o l t a g e

Low Voltage Reset

Note:

*1: To make sure that the system oscillator has stabilized, the SST provides an extra delay of 1024 system

clock pulses before entering the normal operation.

*2: Since low voltage state has to be maintained in its original state for over 1ms, therefore after 1ms delay,

the device enters the reset mode.

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