HT46C64 datasheet(10/47 Pages) HOLTEK

10 / 47 page

HT46R64/HT46C64

Rev. 1.40

September 21, 2004

[m].i

². They are also indirectly accessible through mem-

ory pointer registers (MP0;01H/MP1;03H). The space

before 40H is overlapping in each bank.

Indirect Addressing Register

Location 00H and 02H are indirect addressing registers

that are not physically implemented. Any read/write op-

eration of [00H] and [02H] accesses the RAM pointed to

by MP0 (01H) and MP1(03H) respectively. Reading lo-

cation 00H or 02H indirectly returns the result 00H.

While, writing it indirectly leads to no operation.

The function of data movement between two indirect ad-

dressing registers is not supported. The memory pointer

registers, MP0 and MP1, are both 8-bit registers used to

access the RAM by combining corresponding indirect

addressing registers. MP0 can only be applied to data

memory, while MP1 can be applied to data memory and

LCD display memory.

Accumulator

- ACC

The accumulator (ACC) is related to the ALU opera-

tions. It is also mapped to location 05H of the RAM and

is capable of operating with immediate data. The data

movement between two data memory locations must

pass through the ACC.

Arithmetic and Logic Unit

- ALU

This circuit performs 8-bit arithmetic and logic opera-

tions and provides the following functions:

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ etc.)

The ALU not only saves the results of a data operation

but also changes the status register.

Status Register

- STATUS

The status register (0AH) is 8 bits wide and contains, a

carry flag (C), an auxiliary carry flag (AC), a zero flag (Z),

an overflow flag (OV), a power down flag (PDF), and a

watchdog time-out flag (TO). It also records the status

information and controls the operation sequence.

Except for the TO and PDF flags, bits in the status regis-

ter can be altered by instructions similar to other regis-

ters. Data written into the status register does not alter

the TO or PDF flags. Operations related to the status

intended. The TO and PDF flags can only be changed

by a Watchdog Timer overflow, chip power-up, or clear-

ing the Watchdog Timer and executing the

²HALT² in-

struction. The Z, OV, AC, and C flags reflect the status of

the latest operations.

On entering the interrupt sequence or executing the

subroutine call, the status register will not be automati-

cally pushed onto the stack. If the contents of the status

is important, and if the subroutine is likely to corrupt the

status register, the programmer should take precautions

and save it properly.

Interrupts

The device provides two external interrupts, two internal

timer/event counter interrupts, an internal time base in-

terrupt, and an internal real time clock interrupt and the

A/D converter interrupt (NMI). The interrupt control reg-

ister 0 (INTC0;0BH) and interrupt control register 1

(INTC1;1EH) both contain the interrupt control bits that

are used to set the enable/disable status and interrupt

request flags.

Labels

Bits

Function

C is set if an operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate

through carry instruction.

AC is set if an operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero; otherwise Z is cleared.

OV is set if an operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF

PDF is cleared by either a system power-up or executing the

²CLR WDT² instruction. PDF is

set by executing the

²HALT² instruction.

TO is cleared by a system power-up or executing the

²CLR WDT² or ²HALT² instruction. TO is

set by a WDT time-out.

6~7

Unused bit, read as

²0²

Status Register

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