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HT46C64 датащи(PDF) 21 Page - Holtek Semiconductor Inc

номер детали HT46C64
подробное описание детали  A/D with LCD Type 8-Bit MCU
PDF  47 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
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HT46C64 датащи(HTML) 21 Page - Holtek Semiconductor Inc

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HT46R64/HT46C64
Rev. 1.40
21
September 21, 2004
data register will enable the PWM output function and
writing
²0² will force the PD0/PD1/PD2/PD3 to stay at
²0².
A (6+2) bits mode PWM cycle is divided into four modu-
lation cycles (modulation cycle 0~modulation cycle 3).
Each modulation cycle has 64 PWM input clock period.
In a (6+2) bit PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.2.
The group 2 is denoted by AC which is the value of
PWM.1~PWM.0.
In a (6+2) bits mode PWM cycle, the duty cycle of each
modulation cycle is shown in the table.
Parameter
AC (0~3)
Duty Cycle
Modulation cycle i
(i=0~3)
i<AC
DC+1
64
i
³AC
DC
64
A (7+1) bits mode PWM cycle is divided into two modu-
lation cycles (modulation cycle0~modulation cycle 1).
Each modulation cycle has 128 PWM input clock period.
In a (7+1) bits PWM function, the contents of the PWM
register is divided into two groups. Group 1 of the PWM
register is denoted by DC which is the value of
PWM.7~PWM.1.
The group 2 is denoted by AC which is the value of
PWM.0.
In a (7+1) bits mode PWM cycle, the duty cycle of each
modulation cycle is shown in the table.
Parameter
AC (0~1)
Duty Cycle
Modulation cycle i
(i=0~1)
i<AC
DC+1
128
i
³AC
DC
128
The modulation frequency, cycle frequency and cycle
duty of the PWM output signal are summarized in the
following table.
f S Y S / 2
P W M
[ P W M ] = 1 0 0
[ P W M ] = 1 0 1
P W M
[ P W M ] = 1 0 2
P W M
[ P W M ] = 1 0 3
P W M
P W M c y c l e : 2 5 6 / f S Y S
2 5 / 6 4
2 6 / 6 4
2 6 / 6 4
2 6 / 6 4
2 5 / 6 4
2 5 / 6 4
2 5 / 6 4
2 5 / 6 4
2 5 / 6 4
2 5 / 6 4
2 5 / 6 4
2 6 / 6 4
2 6 / 6 4
2 5 / 6 4
2 5 / 6 4
2 6 / 6 4
2 5 / 6 4
2 6 / 6 4
2 6 / 6 4
2 6 / 6 4
M o d u l a t i o n c y c l e 0
P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S
M o d u l a t i o n c y c l e 1
M o d u l a t i o n c y c l e 2
M o d u l a t i o n c y c l e 3
M o d u l a t i o n c y c l e 0
(6+2) PWM Mode
f S Y S / 2
P W M
[ P W M ] = 1 0 0
[ P W M ] = 1 0 1
P W M
[ P W M ] = 1 0 2
P W M
[ P W M ] = 1 0 3
P W M
P W M m o d u l a t i o n p e r i o d : 1 2 8 / f S Y S
5 0 / 1 2 8
5 1 / 1 2 8
5 1 / 1 2 8
5 2 / 1 2 8
5 0 / 1 2 8
5 0 / 1 2 8
5 1 / 1 2 8
5 1 / 1 2 8
5 0 / 1 2 8
5 1 / 1 2 8
5 1 / 1 2 8
5 2 / 1 2 8
M o d u l a t i o n c y c l e 0
P W M c y c l e : 2 5 6 / f S Y S
M o d u l a t i o n c y c l e 1
M o d u l a t i o n c y c l e 0
(7+1) PWM Mode



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