P89LPC932 datasheet(24/60 Pages) PHILIPS

24 / 60 page

Philips Semiconductors

P89LPC932

8-bit microcontroller with accelerated two-clock 80C51 core

Product data

Rev. 04 — 06 January 2004

24 of 60

9397 750 12379

If Brownout detection is enabled, the operating voltage range for VDD is 2.7 V to 3.6 V,

and the brownout condition occurs when VDD falls below the brownout trip voltage,

VBO (see Table 8 “DC electrical characteristics”), and is negated when VDD rises

above VBO. If brownout detection is disabled, the operating voltage range for VDD is

2.4 V to 3.6 V. If the P89LPC932 device is to operate with a power supply that can be

below 2.7 V, BOE should be left in the unprogrammed state so that the device can

operate at 2.4 V, otherwise continuous brownout reset may prevent the device from

operating.

For correct activation of Brownout detect, the VDD rise and fall times must be

observed. Please see Table 8 “DC electrical characteristics” for speciﬁcations.

8.13.2

Power-on detection

The Power-on Detect has a function similar to the Brownout detect, but is designed to

work as power comes up initially, before the power supply voltage reaches a level

where Brownout detect can work. The POF ﬂag in the RSTSRC register is set to

indicate an initial power-up condition. The POF ﬂag will remain set until cleared by

software.

8.14 Power reduction modes

The P89LPC932 supports three different power reduction modes. These modes are

Idle mode, Power-down mode, and total Power-down mode.

8.14.1

Idle mode

Idle mode leaves peripherals running in order to allow them to activate the processor

when an interrupt is generated. Any enabled interrupt source or reset may terminate

Idle mode.

8.14.2

Power-down mode

The Power-down mode stops the oscillator in order to minimize power consumption.

The P89LPC932 exits Power-down mode via any reset, or certain interrupts. In

Power-down mode, the power supply voltage may be reduced to the RAM keep-alive

voltage VRAM. This retains the RAM contents at the point where Power-down mode

was entered. SFR contents are not guaranteed after VDD has been lowered to VRAM,

therefore it is highly recommended to wake up the processor via reset in this case.

VDD must be raised to within the operating range before the Power-down mode is

exited.

Some chip functions continue to operate and draw power during Power-down mode,

increasing the total power used during Power-down. These include: Brownout detect,

Watchdog Timer, Comparators (note that Comparators can be powered-down

separately), and Real-Time Clock (RTC)/System Timer. The internal RC oscillator is

disabled unless both the RC oscillator has been selected as the system clock and the

RTC is enabled.

8.14.3

Total Power-down mode

This is the same as Power-down mode except that the brownout detection circuitry

and the voltage comparators are also disabled to conserve additional power. The

internal RC oscillator is disabled unless both the RC oscillator has been selected as

the system clock and the RTC is enabled. If the internal RC oscillator is used to clock

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