WM8595 datasheet(21/82 Pages) WOLFSON

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Production Data

WM8595

PD, Rev 4.2, January 2011

DEVICE ID AND REVISION

Reading from register R0 returns the device ID. Reading from register R1 returns the device revision

number.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

DEVICE_ID

00h

15:0

DEVICE_ID

[15:0]

10000101

10010101

Device ID

A read of this register will return the device

ID, 0x8595.

REVISION

01h

7:0

REVNUM

[7:0]

N/A

Device Revision

A read of this register will return the device

revision number. This number is sequentially

incremented if the device design is updated.

Table 10 Device ID and Revision Number

DIGITAL AUDIO DATA FORMATS

The WM8595 supports a range of common audio interface formats:

•

Left Justified (LJ)

•

Right Justified (RJ)

•

DSP Mode A

•

DSP Mode B

All formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the exception

of 32 bit RJ mode, which is not supported.

Audio data for each stereo channel is time multiplexed with the interface’s left/right clock indicating

whether the left or right channel is present. The left/right clock is also used as a timing reference to

indicate the beginning or end of the data words.

In LJ, RJ and I2S modes, the minimum number of bit clock periods per left/right clock period is two

times the selected word length. The left/right clock must be high for a minimum of bit clock periods

equivalent to the word length, and low for the same period. For example, for a word length of 24 bits,

the left/right clock must be high for a minimum of 24 bit clock periods and low for a minimum of 24

bit clock periods. Any mark to space ratio is acceptable for the left/right clock provided these

requirements are met.

In DSP modes A and B, left and right channels must be time multiplexed and input on DACDAT.

LRCLK is used as a frame synchronisation signal to identify the MSB of the first input word. The

minimum number of bit clock periods per left/right clock period is two times the selected word length.

Any mark to space ratio is acceptable for the left/right clock provided the rising edge is correctly

positioned.

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