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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP320C2811PBKA датащи(PDF) 19 Page - Texas Instruments |
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TMP320C2811PBKA датащи(HTML) 19 Page - Texas Instruments |
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19 / 147 page  Introduction 19 June 2004 SPRS257 Table 2−2. Signal Descriptions† (Continued) NAME DESCRIPTION PU/PD§ I/O/Z‡ PIN NO. NAME DESCRIPTION PU/PD§ I/O/Z‡ 128-PIN PBK 176-PIN PGF 179-PIN GHH AND ZHH XINTF SIGNALS (2812 ONLY) (CONTINUED) XMP/MC F1 17 − I PD Microprocessor/Microcomputer Mode Select. Switches between microprocessor and microcomputer mode. When high, Zone 7 is enabled on the external interface. When low, Zone 7 is disabled from the external interface, and on-chip boot ROM may be accessed instead. This signal is latched into the XINTCNF2 register on a reset and the user can modify this bit in software. The state of the XMP/MC pin is ignored after reset. XHOLD E7 159 − I PU External Hold Request. XHOLD, when active (low), requests the XINTF to release the external bus and place all buses and strobes into a high-impedance state. The XINTF will release the bus when any current access is complete and there are no pending accesses on the XINTF. XHOLDA K10 82 − O/Z − External Hold Acknowledge. XHOLDA is driven active (low) when the XINTF has granted a XHOLD request. All XINTF buses and strobe signals will be in a high-impedance state. XHOLDA is released when the XHOLD signal is released. External devices should only drive the external bus when XHOLDA is active (low). XZCS0AND1 P1 44 − O/Z − XINTF Zone 0 and Zone 1 Chip Select. XZCS0AND1 is active (low) when an access to the XINTF Zone 0 or Zone 1 is performed. XZCS2 P13 88 − O/Z − XINTF Zone 2 Chip Select. XZCS2 is active (low) when an access to the XINTF Zone 2 is performed. XZCS6AND7 B13 133 − O/Z − XINTF Zone 6 and Zone 7 Chip Select. XZCS6AND7 is active (low) when an access to the XINTF Zone 6 or Zone 7 is performed. XWE N11 84 − O/Z − Write Enable. Active-low write strobe. The write strobe waveform is specified, per zone basis, by the Lead, Active, and Trail periods in the XTIMINGx registers. XRD M3 42 − O/Z − Read Enable. Active-low read strobe. The read strobe waveform is specified, per zone basis, by the Lead, Active, and Trail periods in the XTIMINGx registers. NOTE: The XRD and XWE signals are mutually exclusive. XR/W N4 51 − O/Z − Read Not Write Strobe. Normally held high. When low, XR/W indicates write cycle is active; when high, XR/W indicates read cycle is active. † Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA. ‡ I = Input, O = Output, Z = High impedance § PU = pin has internal pullup; PD = pin has internal pulldown |
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