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MEC1322 датащи(PDF) 194 Page - Microchip Technology |
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MEC1322 датащи(HTML) 194 Page - Microchip Technology |
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194 / 456 page ![]() MEC1322 DS00001719D-page 194 2014 - 2015 Microchip Technology Inc. FIGURE 15-2: INTERRUPT STRUCTURE 15.8.1 WAKE GENERATION The EC Interrupt Aggregator notifies the Chip Power Management Features to wake the system when it detects a wake capable event has occurred. This logic requires no clocks. The interrupt sources AND’ed with the corresponding Enable bit will be OR’ed to produce a wake event The wake up sources are identified with a “Y” in the “WAKE” column of the Bit definitions table for each IRQ’s Source Register. 15.8.1.1 Configuring Wake Interrupts All GPIO inputs are wake-capable. In order for a GPIO input to wake the MEC1322 from a sleep state, the Interrupt Detection field of the GPIO Pin Control Register must be set to Rising Edge Triggered, Falling Edge Triggered, or Either Edge Triggered. If the Interrupt Detection field is set to any other value, a GPIO input will not trigger a wake interrupt. Some of the Wake Capable Interrupts are triggered by activity on pins that are shared with a GPIO. These interrupts will only trigger a wake if the Interrupt Detection field of the corresponding GPIO Pin Control Register is set to Rising Edge Triggered, Falling Edge Triggered, or Either Edge Triggered. APPLICATION NOTE: Neither LPC accesses nor JTAG debug accesses are wake capable. In order to enable LPC transactions to MEC1322 Logical Devices while the MEC1322 is in a Sleep mode in which the main oscillator is shut off, just before entering sleep EC firmware must enable an interrupt on the falling edge of the GPIO associated with the LFRAME# input. When responding to this LFRAME/GPIO interrupt EC firmware should disable the LFRAME/GPIO interrupt until firmware determines that it is again appropriate to enter a Deep Sleep mode. Similarly, EC SOURCE0 ENABLE0 Int source Int enable SOURCE1 SOURCEn .. . ENABLE1 ENABLEn .. . .. . .. . .. . Interrupt from block NVIC Inputs for blocks GIRQx Block Enable NVIC Input for GIRQx Bit x .. . Interrupt from block Interrupt from block NVIC_EN result To Wake Interface .. . .. . |
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