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MEC1322 датащи(PDF) 151 Page - Microchip Technology

номер детали MEC1322
подробное описание детали  Keyboard and Embedded Controller for Notebook PC
PDF  456 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MEC1322 датащи(HTML) 151 Page - Microchip Technology

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 2014 - 2015 Microchip Technology Inc.
DS00001719D-page 151
MEC1322
11.11.2
CPU_RESET HARDWARE SPEED-UP
The ALT_CPU_RESET bit generates, under program control, the ALT_RST# signal, which provides an alternate, means
to drive the MEC1322 CPU_RESET pin which in turn is used to reset the Host CPU. The ALT_RST# signal is internally
NANDed together with the KBDRESET# pulse from the KRESET Speed up logic to provide an alternate software means
of resetting the host CPU.
Before another ALT_RST# pulse can be generated, ALT_CPU_RESET must be cleared to ‘0’ either by an nSIO_RESET
or by a write to the Port 92 Register with bit 0 = ‘0’. An ALT_RST# pulse is not generated in the event that the
ALT_CPU_RESET bit is cleared and set before the prior ALT_RESET# pulse has completed.
If the 8042EM Sleep Enable is asserted, or the 8042 EM ACTIVATE bit is de-asserted, the 1MHz clocks source is dis-
abled.
FIGURE 11-4:
GATEA20 IMPLEMENTATION DIAGRAM
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
SAEN
64&AEN#
Data
AEN#&60
Address
Q
Q
SET
CLR
D
Q
Q
SET
CLR
D
SETGA20L Reg (Any WR)
RSTGA20L Reg (Any WR)
24MHz
IOW#
AEN#&64
GATEA20 Reg WR (D0)
GATEA20 Reg RD (D0)
CPU RESET
SD[7:0] = FE
SD[7:0] = FF
SD[7:0] = D1
IOW#
nIOW
nIOW
nIOW
IOW#
AEN#&60
KRESET Gen
IBF
ENAB P92
Port 92 Reg (D1)
GATEA20
VCC
VCC



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