MEC1322 datasheet(126/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 126

 2014 - 2015 Microchip Technology Inc.

9.10.5

MEMORY WRITE LIMIT 0 REGISTER

9.10.6

MEMORY BASE ADDRESS 1 REGISTER

9.10.7

MEMORY READ LIMIT 1 REGISTER

Offset

0Ah

Bits

Description

Type

Default

Reset

Event

15 Reserved

14:2 MEMORY_WRITE_LIMIT_0

Whenever a write of any byte in EC DATA Register is attempted and

bit 15 of EC_Address is 0, the field EC_ADDRESS_MSB in the

EC_Address Register is compared to this field. As long as EC_Ad-

dress[14:2] is less than Memory_Write_Limit_0[14:2] the addressed

bytes in the EC DATA Register will be written into the internal 24-bit

address space. If EC_Address[14:2] is greater than or equal to the

Memory_Write_Limit_0[14:2] no writes will take place.

R/W

VCC1_R

ESET

1:0 Reserved

Offset

0Ch

Bits

Description

Type

Default

Reset

Event

31:2 MEMORY_BASE_ADDRESS_1

This memory base address defines the beginning of region 1 in the

Embedded Controller’s 32-bit internal address space. Memory allo-

cated to region 1 is intended to be shared between the Host and the

EC. The region defined by this base register is used when bit 15 of

the EC Address Register is 1. The access will be to a memory loca-

tion at an offset defined by the EC_Address relative to the beginning

of the region defined by this register. Therefore, a read or write to the

memory that is triggered by the EC Data Register will occur at Mem-

ory_Base_Address_1 + EC_Address.

R/W

VCC1_R

ESET

1:0 Reserved

Offset

10h

Bits

Description

Type

Default

Reset

Event

15 Reserved

14:2 MEMORY_READ_LIMIT_1

Whenever a read of any byte in the EC Data Register is attempted,

and bit 15 of EC_ADDRESS is 1, the field EC_ADDRESS in the

EC_Address_Register is compared to this field. As long as EC_AD-

DRESS is less than this value, the EC_Data_Register will be loaded

from the 24-bit internal address space.

R/W

VCC1_R

ESET

1:0 Reserved

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