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MEC1322 датащи(PDF) 119 Page - Microchip Technology

номер детали MEC1322
подробное описание детали  Keyboard and Embedded Controller for Notebook PC
PDF  456 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MEC1322 датащи(HTML) 119 Page - Microchip Technology

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 2014 - 2015 Microchip Technology Inc.
DS00001719D-page 119
MEC1322
some operations as a result. When it is completed processing the packet, the EC can inform the Host, either
through a message in the EC-to-Host channel or by triggering an event such as an SMI directly. If return results
are required, the EC can write the results into the Read/Write region, which the Host can read directly when it is
informed that the EC has completed processing. Depending on the command, the operations could entail update
of virtual registers in the 32-bit internal address space, reads of any register in the EC address space, or writes of
any register in the EC address space. Because there are two regions that are defined by the base registers, the
memory used for the communication packet does not have to be contiguous with a set of virtual registers.
Because there are two Embedded Memory Interface memory regions, the Embedded Memory Interface cannot be used
for more than two of these functions at a time. The Host can request that the EC switch from one function to another
through the use of the Host-to-EC mailbox register.
The Application ID Register is provided to help software applications track ownership of an Embedded Memory Inter-
face. An application can write the register with its Application ID, then immediately read it back. If the read value is not
the same as the value written, then another application has ownership of the interface.
9.9
Runtime Registers
The registers listed in the Runtime Register Summary table are for a single instance of the EMI. The addresses of each
register listed in this table are defined as a relative offset to the host “Base Address” defined in the Runtime Register
Base Address Table.
Note 9-1
The Base Address indicates where the first register can be accessed in a particular address space
for a block instance.
Note:
The protocol used to pass commands back and forth through the Embedded Memory Interface Registers
Interface is left to the System designer. Microchip can provide an application example of working code in
which the host uses the Embedded Memory Interface registers to gain access to all of the EC registers.
TABLE 9-5:
RUNTIME REGISTER BASE ADDRESS TABLE
Block Instance
Instance
Number
Host
Address Space
Base Address (
Note 9-1)
EMI
0
EC
32-bit internal
address space
400F_0000h
EMI
0
LPC
I/O
Programmed BAR
TABLE 9-6:
RUNTIME REGISTER SUMMARY
Offset
Register Name (Mnemonic)
00h
HOST-to-EC Mailbox Register
01h
EC-to-HOST Mailbox Register
02h
EC Address LSB Register
03h
EC Address MSB Register
04h
EC Data Byte 0 Register
05h
EC Data Byte 1 Register
06h
EC Data Byte 2 Register
07h
EC Data Byte 3 Register
08h
Interrupt Source LSB Register
09h
Interrupt Source MSB Register
0Ah
Interrupt Mask LSB Register
0Bh
Interrupt Mask MSB Register
0Ch
Application ID Register



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