KAF−8300

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16

AC Operating Conditions

Table 11. CLOCK LEVELS

Description

Symbol

Level

Min.

Nom.

Max.

Unit

Effective

Capacitance

Notes

V1 Low Level

Low

−9.5

−9.25

−9.0

V

76 nF

1

V1 High Level

High

2.4

2.6

2.85

V

1

V2 Low Level

Low

−9.5

−9.25

−9.0

V

81 nF

1

V2 High Level

High

2.4

2.6

2.8

V

1

RG, H1, H2, Amplitude

Amplitude

5.5

6.0

6.5

V

RG = 7 pF

H1 = 224 pF

H2 = 168 pF

1

H1L, Amplitude

Amplitude

7.5

8.0

8.5

V

7 pF

1

H1 Low Level

Low

−4.7

−4.5

−4.3

V

1

H1L Low Level

Low

−6.7

−6.5

−6.3

V

H2 Low Level

Low

−5.2

−5.0

−4.8

V

RG Low Level

Low

1.8

2.0

2.2

V

1

1. All pins draw less than 10

mA DC current. Capacitance values relative to SUB (substrate).

Table 12. CLOCK VOLTAGE DETAIL CHARACTERISTICS

Description

Symbol

Min.

Nom.

Max.

Unit

Notes

V1 High-Level Variation

−

0.50

1.0

V

High-Level Coupling

V2 High-Level Variation

−

0.28

1.0

V

High-Level Coupling

V2 Low-Level Variation

−

0.46

1.0

V

Low-Level Coupling

V1 Low-Level Variation

−

0.14

1.0

V

Low-Level Coupling

V1−V2 Cross-Over

−2.0

−0.5

1.0

V

Referenced to Ground

H1 High-Level Variation

−

0.30

1.0

V

H1 High-Level Variation

−

0.07

1.0

V

H1 Low-Level Variation

−

0.16

1.0

V

H1 Low-Level Variation

−

0.25

1.0

V

H2 High-Level Variation

−

0.40

1.0

V

H2 High-Level Variation

−

0.06

1.0

V

H2 Low-Level Variation

−

0.10

1.0

V

H2 Low-Level Variation

−

0.27

1.0

V

H1−H2 Cross-Over

−3.0

−1.23

0

V

Rising Side of H1

H1−H2 Cross-Over

−3.0

−0.59

0

V

Falling Side of H1

H1L High-Lever Variation

−

0.64

1.0

V

H1L High-Lever Variation

−

0.32

1.0

V

H1L Low-Lever Variation

−

0.27

1.0

V

H1L Low-Lever Variation

−

0.23

1.0

V

H1L−H2 Cross-Over

−1.0

−

−3.0

V

Rising Side of H1L

RG High-Level Variation

−

0.19

1.0

V

RG High-Level Variation

−

0.20

1.0

V

RG Low-Level Variation

−

0.11

1.0

V

RG Low-Level Variation

−

0.30

1.0

V

1. H1, H2 clock frequency: 28 MHz. The maximum and minimum values in this table are supplied for reference. The actual clock levels were

measured using the KAF−8300 Evaluation Board. Testing against the device performance specifications is performed using the nominal

values.