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KAF-8300 датащи(PDF) 15 Page - ON Semiconductor

номер детали KAF-8300
подробное описание детали  Full Frame CCD Image Sensor
PDF  28 Pages
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производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

KAF-8300 датащи(HTML) 15 Page - ON Semiconductor

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15
OPERATION
Table 9. ABSOLUTE MAXIMUM RATINGS
Description (Note 9)
Symbol
Minimum
Maximum
Unit
Notes
Diode Pin Voltages
VDIODE
−17.5
17.5
V
1, 2
Gate Pin Voltages
VGATE1
−13.5
13.5
V
1, 3
Overlapping Gate Voltages
V1−2
−13.5
13.5
V
4
Non-Overlapping Gate Voltages
Vg−g
−13.5
13.5
V
5
V1, V2 − LOD Voltages
VVVL
−13.5
13.5
V
6
Output Bias Current
IOUT
−30
mA
7
LODT Diode Voltage
VLODT
−13.0
13.0
V
8
LODB Diode Voltage
VLODB
−18.0
18.0
V
8
Operating Temperature
TOP
−10
70
°C
10
Guaranteed Temperature of Performance
TSP
0
60
°C
11
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Referenced to pin SUB.
2. Includes pins: RD, VDD, VSS, and VOUT.
3. Includes pins: V1, V2, H1, H1L, H2, RG, OG.
4. Voltage difference between overlapping gates. Includes: V1 to V2; H1, H1L to H2; H1L to OG; V1 to H2.
5. Voltage difference between non-overlapping gates. Includes: V1 to H1, H1L; V2, OG to H2.
6. Voltage difference between V1 and V2 gates and LODT, LODB diode.
7. Avoid shorting output pins to ground or any low impedance source during operation. Amplifier bandwidth increases at higher currents and
lower load capacitance at the expense of reduced gain (sensitivity). Operation at these values will reduce MTF.
8. V1, H1, V2, H2, H1L, OG, and RD are tied to 0 V.
9. Absolute maximum rating is defined as a level or condition that should not be exceeded at any time per the description. If the level or condition
is exceeded, the device will be degraded and may be damaged.
10. Noise performance will degrade at higher temperatures.
11. See section for Imaging Performance Specifications.
Power-Up Sequence
The sequence chosen to perform an initial power-up is not
critical for device reliability. A coordinated sequence may
minimize
noise
and
the
following
sequence
is
recommended:
1. Connect the ground pins (SUB).
2. Supply the appropriate biases and clocks to the
remaining pins.
Table 10. DC BIAS OPERATING CONDITIONS
Description
Symbol
Minimum
Nominal
Maximum
Unit
Maximum DC
Current (mA)
Notes
Reset Drain
RD
11.3
11.5
11.7
V
IRD = 0.01
Output Amplifier Return
VSS
1.05
1.25
1.45
V
ISS = −3.0
Output Amplifier Supply
VDD
14.5
15.0
15.5
V
IOUT + ISS
Substrate
SUB
GND
V
−0.01
2
Output Gate
OG
−3.0
−2.8
−2.6
V
0.1
Lateral Drain
LODT, LODB
9.5
9.75
10.0
V
0.2
2
Video Output Current
IOUT
−3
−5
−8
mA
1
1. An output load sink must be applied to VOUT to activate output amplifier − see Figure 5.
2. Maximum current expected up to saturation exposure (ESAT).



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