RF63 datasheet(60/91 Pages) ETC2

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ADVANCED COMMUNICATIONS & SENSING

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RF63

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6.3. Interrupt Configuration Parameters - IRQParam

The detailed description of the IRQParam register is given in Table 28.

Table 28: IRQParam Register Description

Name

Bits

Address

(d)

Description

Rx_stby_irq_0

7-6

r/w

IRQ_0 source in Rx and Standby modes:

If Data_mode(1:0) = 00 (Continuous mode):

- Sync (d)

- RSSI

- Sync

If Data_mode(1:0) = 01 (Buffered mode):

- - (d)

- Write_byte

- /Fifoempty*

- Sync

If Data_mode(1:0) = 1x (Packet mode):

- Payload_ready (d)

- Write_byte

- /Fifoempty*

- Sync or Adrs_match (the latter if address filtering is enabled)

*also available in Standby mode (Cf sections 5.4.4 and 5.5.7)

Rx_stby_irq_1

5-4

r/w

IRQ_1 source in Rx and Standby modes:

If Data_mode(1:0) = 00 (Continuous mode):

- DCLK

If Data_mode(1:0) = 01 (Buffered mode):

- - (d)

- Fifofull*

- RSSI

- Fifo_threshold*

If Data_mode(1:0) = 1x (Packet mode):

- CRC_ok (d)

- Fifofull*

- RSSI

- Fifo_threshold*

*also available in Standby mode (Cf sections 5.4.4 and 5.5.7)

Tx_irq_1

r/w

IRQ_1 source in Tx mode:

If Data_mode(1:0) = 00 (Continuous mode):

- DCLK

If Data_mode(1:0) = 01 (Buffered mode) or 1x (Packet mode):

- Fifofull (d)

- Tx_done

Fifofull

Fifofull IRQ source

Goes high when FIFO is full.

/Fifoempty

/Fifoempty IRQ source

Goes low when FIFO is empty

Fifo_overrun_clr

r/w/

Goes high when an overrun error occurred. Writing a 1 clears flag and FIFO

Fifo_fill_method

r/w

FIFO filling method (Buffered mode only):

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