RF63 datasheet(40/91 Pages) ETC2

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ADVANCED COMMUNICATIONS & SENSING

Page 40 of 91

RF63

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5.2.3. Sync Word Recognition

5.2.3.1. Overview

Sync word recognition (also called Pattern recognition in previous products) is activated by setting

RXParam_Sync_on. The bit synchronizer must also be activated.

The block behaves like a shift register; it continuously compares the incoming data with its internally programmed

Sync word and asserts the Sync IRQ source on each occasion that a match is detected. This is illustrated in Figure

33.

Rx DATA

(NRZ)

Bit N-x =

Bit N-1 =

Bit N =

Sync_value[x]

Sync_value[1] Sync_value[0]

DCLK

SYNC

Figure 33: Sync Word Recognition

During the comparison of the demodulated data, the first bit received is compared with bit 7 (MSB) of byte at

address 22 and the last bit received is compared with bit 0 (LSB) of the last byte whose address is determined by

the length of the Sync word.

When the programmed Sync word is detected the user can assume that this incoming packet is for the node and

can be processed accordingly.

5.2.3.2. Configuration

•

Size: Sync word size can be set to 8, 16, 24 or 32 bits via RXParam_Sync_size. In Packet mode this field is

also used for Sync word generation in Tx mode.

•

Error tolerance: The number of errors tolerated in the Sync word recognition can be set to 0, 1, 2 or 3 via

RXParam_Sync_tol.

•

Value: The Sync word value is configured in SYNCParam_Sync_value. In Packet mode this field is also used

for Sync word generation in Tx mode.

5.2.4. Packet Handler

The packet handler is the block used in Packet mode. Its functionality is fully described in section 5.5.

5.2.5. Control

The control block configures and controls the full chip

‟s behavior according to the settings programmed in the

configuration registers.

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