RF63 datasheet(48/91 Pages) ETC2

номер детали	RF63

подробное описание детали	Ultra-Low Power Integrated UHF Transceiver

PDF	91 Pages

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производитель	ETC2 [List of Unclassifed Manufacturers]

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ADVANCED COMMUNICATIONS & SENSING

Page 48 of 91

RF63

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Write packet bytes into FIFO. Tx starts when the first byte is written (Tx_start_irq_0=1). W e assume the FIFO is

being filled via SPI Data faster than being unfilled by SR.

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Wait for Tx_done interrupt (+1 bit period)

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Go to Sleep mode

Rx Mode:

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Program Rx/Stby interrupts: IRQ_0 mapped to /Fifoempty (Rx_stby_irq_0=10) and IRQ_1 mapped to

Fifo_threshold (Rx_stby_irq_1=11). Configure Fifo_thresh to an appropriate value (ex: to detect packet end if

its length is known)

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Go to Rx mode (note that Rx is not ready immediately, Cf section 7.3.1).

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Wait for Fifo_threshold interrupt (i.e. Sync word has been detected and FIFO filled up to the defined threshold).

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If it is packet end, go to Stby (SR

‟s content is lost).

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Read packet bytes from FIFO until /Fifoempty goes low (or correct number of bytes is read).

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Go to Sleep mode.

RF63 датащи(PDF) 48 Page - List of Unclassifed Manufacturers