PIC16F628-20SLASHSS datasheet(102/160 Pages) MICROCHIP

102 / 160 page

PIC16F62X

DS40300B-page 102

Preliminary

14.5.5

TIME-OUT SEQUENCE

On power-up the time-out sequence is as follows: First

PWRT time-out is invoked after POR has expired. Then

OST is activated. The total time-out will vary based on

oscillator configuration and PWRTE bit status. For

example, in ER mode with PWRTE bit erased (PWRT

disabled), there will be no time-out at all. Figure 14-10,

Figure 14-11

and

Figure 14-12

depict

time-out

sequences.

Since the time-outs occur from the POR pulse, if MCLR

is kept low long enough, the time-outs will expire. Then

bringing MCLR high will begin execution immediately

(see Figure 14-11). This is useful for testing purposes

or to synchronize more than one PIC16F62X device

operating in parallel.

Table 14-6 shows the reset conditions for some special

registers, while Table 14-7 shows the reset conditions

for all the registers.

14.5.6

POWER CONTROL (PCON)/

STATUS REGISTER

The power control/status register, PCON (address

8Eh) has two bits.

Bit0 is BOD (Brown-out). BOD is unknown on

power-on-reset. It must then be set by the user and

checked on subsequent resets to see if BOD = 0

indicating that a brown-out has occurred. The BOD

status bit is a don’t care and is not necessarily

predictable if the brown-out circuit is disabled (by

setting BODEN bit = 0 in the Configuration word).

Bit1

POR

(Power-on-reset).

‘0’

power-on-reset and unaffected otherwise. The user

must write a ‘1’ to this bit following a power-on-reset.

On a subsequent reset if POR is ‘0’, it will indicate that

a power-on-reset must have occurred (VDD may have

gone too low).

TABLE 14-3:

TIME-OUT IN VARIOUS SITUATIONS

TABLE 14-4:

STATUS/PCON BITS AND THEIR SIGNIFICANCE

Legend: u = unchanged, x = unknown

Oscillator Configuration

Power-up

Brown-out Reset

Wake-up

from SLEEP

PWRTE = 0

PWRTE = 1

XT, HS, LP

72 ms + 1024 TOSC

1024 TOSC

72 ms + 1024 TOSC

1024 TOSC

72 ms

—

72 ms

—

POR

BOD

0X11

Power-on-reset

0X0X

Illegal, TO is set on POR

0XX0

Illegal, PD is set on POR

10XX

Brown-out Detect

110u

WDT Reset

1100

WDT Wake-up

11uu

MCLR reset during normal operation

1110

MCLR reset during SLEEP

TABLE 14-5:

SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on POR

Reset

Value on all

other resets(1)

03h

STATUS

IRP

RP1

RPO

0001 1xxx

000q quuu

8Eh

PCON

—

OSCF

—POR

BOD

---- 1-0x

---- u-uq

Note 1:

Other (non power-up) resets include MCLR reset, Brown-out Detect and Watchdog Timer Reset during normal operation.

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