PIC16F628-20SLASHSS datasheet(64/160 Pages) MICROCHIP

64 / 160 page

PIC16F62X

DS40300B-page 64

Preliminary

10.1

Capture Mode

In Capture mode, CCPR1H:CCPR1L captures the

16-bit value of the TMR1 register when an event occurs

on pin RB3/CCP1. An event is defined as:

• every falling edge

• every rising edge

• every 4th rising edge

• every 16th rising edge

An event is selected by control bits CCP1M3:CCP1M0

(CCP1CON<3:0>). When a capture is made, the inter-

rupt request flag bit CCP1IF (PIR1<2>) is set. It must

be cleared in software. If another capture occurs before

the value in register CCPR1 is read, the old captured

value will be lost.

10.1.1

CCP PIN CONFIGURATION

In Capture mode, the RB3/CCP1 pin should be config-

ured as an input by setting the TRISB<3> bit.

FIGURE 10-1: CAPTURE MODE OPERATION

BLOCK DIAGRAM

10.1.2

TIMER1 MODE SELECTION

Timer1 must be running in timer mode or synchronized

counter mode for the CCP module to use the capture

feature. In asynchronous counter mode, the capture

operation may not work.

10.1.3

SOFTWARE INTERRUPT

When the Capture mode is changed, a false capture

interrupt may be generated. The user should keep bit

CCP1IE (PIE1<2>) clear to avoid false interrupts and

should clear the flag bit CCP1IF following any such

change in operating mode.

10.1.4

CCP PRESCALER

There are four prescaler settings, specified by bits

CCP1M3:CCP1M0. Whenever the CCP module is

turned off, or the CCP module is not in capture mode,

the prescaler counter is cleared. This means that any

reset will clear the prescaler counter.

Switching from one capture prescaler to another may

generate an interrupt. Also, the prescaler counter will

not be cleared, therefore the first capture may be from

a non-zero prescaler. Example 10-1 shows the recom-

mended method for switching between capture pres-

calers. This example also clears the prescaler counter

and will not generate the “false” interrupt.

EXAMPLE 10-1: CHANGING BETWEEN

CAPTURE PRESCALERS

CLRF

CCP1CON

;Turn CCP module off

MOVLW

NEW_CAPT_PS

;Load the W reg with

; the new prescaler

; mode value and CCP ON

MOVWF

CCP1CON

;Load CCP1CON with this

; value

Note:

If the RB3/CCP1 is configured as an out-

put, a write to the port can cause a capture

condition.

CCPR1H

CCPR1L

TMR1H

TMR1L

Set flag bit CCP1IF

(PIR1<2>)

Capture

Enable

Q’s

CCP1CON<3:0>

RB3/CCP1

Prescaler

³ 1, 4, 16

and

edge detect

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