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STC5455 датащи(PDF) 7 Page - Connor-Winfield Corporation |
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STC5455 датащи(HTML) 7 Page - Connor-Winfield Corporation |
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7 / 56 page ![]() Page 7 of 56 TM121 Rev:P1.3 Date: October 24, 2011 © Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice STC5455 Synchronous Clock for SETS Data sheet Preliminary CLK8K 17 O 8kHz frame pulse signal, 50% duty cycle or programmable pulse width (T0) CLK2K 18 O 2kHz frame pulse signal, 50% duty cycle or programmable pulse width (T0) SRCSW 13 I Hard-wired manual reference pre-selection CS 44 I SPI bus chip select SCLK 47 I SPI bus clk SDI 43 I SPI bus data in SDO 52 O SPI bus data out CLKE 42 I SPI Clock edge selection NC 2, 16, 27, 55, 59, 60, 61, 62, 63, 64 No connection. Pins are recommended to be tied to ground Table 1: Pin Description Pin Name Pin # I/O Description |
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