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STC5455 датащи(PDF) 32 Page - Connor-Winfield Corporation |
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STC5455 датащи(HTML) 32 Page - Connor-Winfield Corporation |
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32 / 56 page ![]() Page 32 of 56 TM121 Rev:P1.3 Date: October 24, 2011 © Copyright the Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice STC5455 Synchronous Clock for SETS Data sheet Preliminary Reference activity indicator. 0 = inactive, 1 = active Default value: 0 Refs_Qual, 0x18 (R) Reference qualification indicator. 0 = not qualified, 1 = qualified. Default value: 0 Interrupt_Event_Status, 0x1A (R/W) Event0: Reference qualification status 0 = no change, 1 = reference qualification status changed. Event1: Reserved Event2: T0 selected reference in auto-selection mode 0= no change, 1 = T0 selected reference changed Event3: T0 PLL status 0= no change, 1 = T0 PLL status changed Event4: T0 timing generator’s event out 0= no event out, 1= any of T0 PLL event out is asserted or not cleared at the register of PLL_Event_Out Event5: T4 selected reference in auto-selection mode 0= no change, 1 = T4 selected reference changed Event6: T4 PLL status 0= no change, 1 = T0 PLL status changed Event7: T4 timing generator’s event out 0= no event out, 1= any of T4 PLL event out is asserted or not cleared at the register of PLL_Event_Out Interrupts are cleared by writing “1” to the associated bit. Default value: 0 Interrupt_Event_Enable, 0x1B (R/W) Selects which of events will assert the pin EVENT_INTR to active state (See register Interrupt_Config). Address Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x18 Not Used Ref 5 Ref 4 Ref 3 Ref 2 Ref 1 Address Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x1A Event 7 Event 6 Event 5 Event 4 Event 3 Event 2 Event 1 Event 0 Address Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 0x1B Event 7 Event 6 Event 5 Event 4 Event 3 Event 2 Event 1 Event 0 |
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