STC5455 datasheet(45/56 Pages) CONNOR-WINFIELD

45 / 56 page

Page 45 of 56 TM121

Rev:P1.3

Date: October 24, 2011

STC5455

Synchronous Clock for SETS

Data sheet

Preliminary

the index selected at the register Ref_Index_Selector.

Setting integer N (from 1 to 32767) at this register allows user to manually select the acceptable reference

input frequency at the integer multiple of 8kHz, range from 8kHz to 262.136MHz. For instance, user can select

integer N = 19440 to manually accept frequency at 19440x8kHz = 155.52MHz.

Default value: 0

Frame_Mux, 0x5D (R/W)

Select one of frame signals (Frame8K, Frame2K) derived from synthesizer F and forward it to output selection

of CLK2. Output selection of CLK2 is programmed at the registers CLK2_Sel.

Default value: 1

Field_Upgrade_Status, 0x70 (R)

Checksum

Checks whether the 7600 bytes firmware configuration data is loaded successfully.

0 = Fail, 1 = Success

READY

Indicates if field upgrade is ready to begin, normally is set to 1 at 3 milliseconds (3ms) after the reset.

0 = Not ready

1 = Ready

Load_Complete

Indicates whether the loading of 7600 bytes firmware configuration data is complete.

0 = Not complete

1 = Complete

Field Value

Integer N Select

Enable auto detection for reference input

1~32767

Integer N for the manual acceptable refer-

ence frequency

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x5D

Not used

Frame mux of

CLK2 selection

Bit1~Bit0

Frame signal select

Reserved

Frame8K

Frame2K

Ground

Address

Bit7

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

Bit0

0x70

Not used

Load_Complete

READY

Checksum

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