IR36021 datasheet(30/41 Pages) IRF

30 / 41 page

IR36021

DIGITAL POL BUCK CONTROLLER with I2C AND PMBus

Interface

February 27, 2013 | Rev 3.5

TABLE 20: TELEMETRY BAND‐WIDTH

52Hz / Slow

3.2Hz / Very Slow

Refer to electrical table for Iout filter values

I_CRITICAL has a 5% hysteresis level and the VR_HOT_ICRIT

pin will de‐assert when the average output current level

drops below 95% of the programmed current level

threshold.

Pin Critical Flag

Additionally the IR36021 can be programmed to assert

VR_HOT_ICRIT pin when a user programmable input power

level is exceeded. The assertion is not a fault and the VR

continues to regulate. PIN_CRITICAL monitors a long term

average input power as calculated from the output

current. The equation below shows the calculation

performed by the IC to determine the average input

power.

Iout D





VIN

Where D is the duty cycle and η is the efficiency (fixed at

85%).

The PIN_CRITICAL power level can be programmed in MTP

in 4W steps up to 252W, and if set (must be >4W), is wired

OR’d into the VR_HOT_ICRIT pin. PIN_CRITICAL has a fixed

4W hysteresis level and the VR_HOT_ICRIT pin will de‐

assert when the power level drops 4W below the

programmed input power level threshold.

VR_HOT_ICRIT Pin Functionality Options

The functionality of the VR_HOT_ICRIT pin can be set to

assert when levels of Temp_max, Icc_max, and/or OCP

levels are exceeded. Table 21 shows the multiple

configurations of the VR_HOT_ICRIT pin.

TABLE 21: VR_HOT_ICRIT PIN OPTIONS

Temp_max Only

Temp_max or Icc_max

Temp_max or OCP

Icc_max Only

Input Over‐voltage Protection

IR36021 monitors the input voltage (12V main power

supply) via VINSEN pin. If input under‐voltage protections

is enabled, the VINSEN pin is compared to a fixed threshold

and the IC will shut down if the threshold is

exceeded(Table 22).

TABLE 22: INPUT OVER‐VOLTAGE OPTIONS

Threshold with

14:1 divider

Threshold with

22:1 divider

disabled

‐

enabled

14.5V

23.5V

I2C/PMBUS COMMUNICATION

The IR36021 simultaneously supports I2C and PMBus

through the use of exclusive addressing. The I2C and

PMBus address for the IR36021 is programmed by MTP

bits (I2C_Addr<6:0>) in Table 23, and (PMBus_Addr<3:0>)

in Table 24. This means that a motherboard PMBus master

may communicate with typically up to 8 dual loops, or if

used as single loop controllers, as many as 16 IR36021‐

based VRs. Optionally, a resistor offset can be enabled as

shown in Tables 25 and 26 (note that a 0.01uF capacitor is

required across the resistor per Figure 37). As an example,

setting a base I2C address of 28h with a resistor offset of

+15 sets the I2C address to 37h. Similarly setting a base

PMBus address of 40h with a resistor offset of +15 sets the

PMBus address to 77h. Note that a single I2C address

operates both loops whereas Table 24 sets the PMBus

address of Loop 1, while Loop 2 is offset higher by the

Chip_Addr_Offset register which is defaulted to 1.

Offset

Addr

Chip

PMaddress

Loop





The IR36021 can also set the I2C address independently

from the PMBus address. By using a 7‐bit address the user

can configure the device to any one of 127 different I2C

addresses. Note that I2C address 00h is not allowed. This is

an I2C broadcast address. Setting the I2C address to 00h

forces the I2C address to follow the PMBus address per

Table 24.

Once the address of the IR36021 is set, it is locked to

protect it from being overridden.

For unprogrammed devices, the I2C/PMBus address can

be temporarily forced to address 0Ah for I2C and 0Dh for

PMBus by setting EN=VR_HOT=low.

IR36021 датащи(PDF) 30 Page - International Rectifier

IR36021 датащи(HTML) 30 Page - International Rectifier

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

датащи скачать

ссылки URL