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IR36021 датащи(PDF) 22 Page - International Rectifier |
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IR36021 датащи(HTML) 22 Page - International Rectifier |
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22 / 41 page ![]() IR36021 DIGITAL POL BUCK CONTROLLER with I2C AND PMBus Interface February 27, 2013 | Rev 3.5 22 LOAD LINE The IR36021 enables the implementation of accurate, temperature compensated load lines on both loops. The load line is set by an external resistor RCS, as shown in Figure 24 and the nominal value must also be stored in MTP. The stored load line, scaling and gain values provides the IR36021 with the scaling factor for the digital computation of the total current to determine the OCP threshold and I2C current and output voltage reporting. The load line ranges for IR36021 are shown in Table 7. TABLE 7: LOAD LINE SETTINGS Loop #1 Loop #2 Minimum 0.0 mΩ 0.0 mΩ Maximum 6.375 mΩ 12.75 mΩ Resolution 0.025 mΩ 0.050 mΩ Figure 24 shows a typical 1.3mΩ loadline measurement with minimum and maximum error ranges. The controller accuracy lies well within common processor requirements. For each loop, the sensed current from all the active phases is summed and applied to a resistor network across the RSCP and RCSM pins. This generates a precise proportional voltage which is summed with the sensed output voltage and VID DAC reference to form the error voltage. Also part of the network shown in Figure 32 is thermistor, RTh. For proper loadline temperature compensation, the thermistor is placed near the phase one inductor to accurately sense the inductor temperature. Figure 24: Load Line & Thermal Compensation The resistor RCS is calculated using the following procedure: First the designer calculates the RCSeffective or the total effective parallel resistance across the RSCP and RCSM pins. It is defined by: DCR R ISEN R R LL effective CS _ 8 Where RLL is the desired loadline, typically 1.0mΩ, DCR is DC resistance of the phase inductor, and R_ISEN is the series resistor across the inductor sense circuit. The required value for R_ISEN is a 301Ω, 1% tolerance. Then the designer chooses a suitable NTC thermistor. Thermistor Rth is typically selected to have the lowest thermal coefficient and tightest tolerance in a standard available package. A typical value for the NTC will be 10kΩ, 1% tolerance. Recommended thermistors are shown in Table 8. TABLE 8: 10K 1% NTC THERMISTORS Murata NCP18XH103F03RB Panasonic ERTJ1VG103FA TDK NTCG163JF103F Then the designer calculates RCS using the following equation: Th series effective CS CS R 1 R 2 R 1 1 R . Rseries is selected to achieve minimum loadline error over temperature. The IR DPDC (GUI) provides a graphical tool that allows the user to easily calculate the resistor values for minimum error. The capacitor CCS is defined by the following equation: AVP CS f ve RCSeffecti C 2 1 where, fAVP is the user selectable current sense AVP bandwidth. The best bandwidth is typically in the range of 200kHz to 300kHz. Setting 0mΩ Loadline The load line is turned off by setting a digital bit in the IR36021 register map. This is a separate bit from the load line settings for each loop. |
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