| поискавой системы для электроныых деталей |
|
AN3427 датащи(PDF) 40 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
AN3427 датащи(HTML) 40 Page - STMicroelectronics |
|
40 / 52 page ![]() Firmware migration using the library AN3427 40/52 Doc ID 019001 Rev 1 than or equal to 48 MHz to work correctly. The following is an example of the main PLL configuration to obtain 120 MHz as system clock frequency and 48 MHz for the OTG FS and SDIO. /* PLL_VCO = (HSE_VALUE / PLL_M) * PLL_N = 240 MHz */ #define PLL_M 25 #define PLL_N 240 /* SYSCLK = PLL_VCO / PLL_P = 120 MHz */ #define PLL_P 2 /* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ = 48 MHz */ #define PLL_Q 5 ... /* Configure the main PLL */ RCC_PLLConfig(RCC_PLLSource_HSE, PLL_M, PLL_N, PLL_P, PLL_Q, 0); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == 0) { } ... /* Enable USB OTG FS's AHB interface clock */ RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_OTG_FS, ENABLE); /* Enable SDIO's APB interface clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE); c) ADC: in STM32 F2 series the ADC features two clock schemes: – Clock for the analog circuitry: ADCCLK, common to all ADCs. This clock is generated from the APB2 clock divided by a programmable prescaler that allows the ADC to work at fPCLK2/2, /4, /6 or /8. The maximum value of ADCCLK is 30 MHz when the APB2 clock is at 60 MHz. This configuration is done using the ADC registers. – Clock for the digital interface (used for register read/write access). This clock is equal to the APB2 clock. The digital interface clock can be enabled/disabled individually for each ADC through the RCC APB2 peripheral clock enable register (RCC_APB2ENR). However, there is only a single bit to reset the three ADCs at the same time. /* Enable APB interface clock for ADC1, ADC2 and ADC3 */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3, ENABLE); /* Reset ADC1, ADC2 and ADC3 */ RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC, DISABLE); 4.3 FLASH The table below presents the correspondence between the FLASH driver APIs in the STM32F10x and STM32F2xx Libraries. You can easily update your application code by replacing STM32F10x functions by the corresponding function in STM32F2xx Library. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |