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AN3427 датащи(PDF) 37 Page - STMicroelectronics |
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AN3427 датащи(HTML) 37 Page - STMicroelectronics |
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37 / 52 page ![]() AN3427 Peripheral migration Doc ID 019001 Rev 1 37/52 3.12 Miscellaneous 3.12.1 Ethernet PHY interface selection In STM32 F1 series the Ethernet PHY interface selection is done in the AFIO peripheral (MII_RMII_SEL bit in AFIO_MAPR register), while in F2 series this configuration is done in the SYSCFG peripheral (MII_RMII_SEL bit in SYSCFG_PMC register). 3.12.2 TIM2 internal trigger 1 (ITR1) remapping The example below shows how to select USB OTG FS SOF output or ETH PTP trigger output as input for TIM2 ITR1 in STM32 F1 series: 1. In F1 series to select USB OTG FS SOF output as input for TIM2 ITR1, set to 1 the bit TIM2ITR1_IREMAP in AFIO_MAPR register. Reset this bit to 0 to connect the Ethernet PTP trigger output to TIM2 ITR1 input. 2. In F2 series to select USB OTG FS SOF output as input for TIM2 ITR1, set to [10] the bits ITR1_RMP[1:0] in TIM2_OR register. Set these bits to [01] connect the Ethernet PTP trigger output to TIM2 ITR1 input. |
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