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AN3393 датащи(PDF) 32 Page - STMicroelectronics |
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AN3393 датащи(HTML) 32 Page - STMicroelectronics |
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32 / 103 page ![]() Register description AN3393 32/103 DocID018750 Rev 4 For more information about FIFO refer to Section 10. 4.25 ST1_X (40h-4Fh) State Machine 1 code register ST1_X (X = 1-16). The State Machine 1 system register is composed of sixteen 8-bit registers. Each register can contain an operational code, as described in Section 6. 4.26 TIM4_1 (50h) 8-bit unsigned initial value for Timer Counter 1 (5Dh-5Eh). 1LSb = 1/ODR. 4.27 TIM3_1 (51h) 8-bit unsigned initial value for Timer Counter 1 (5Dh-5Eh). 1LSb = 1/ODR. 4.28 TIM2_1(52h - 53h) 16-bit unsigned initial value for Timer Counter 1 (5Dh-5Eh). 1LSb = 1/ODR. Table 41. FIFO_SRC bit description Bit name Description WTM Watermark status. (0: FIFO filling is lower than WTM level; 1: FIFO filling is equal to or higher than WTM level) OVRN_FIFO Overrun bit status. (0: FIFO is not completely filled; 1: FIFO is completely filled) EMPTY FIFO empty bit status. (0: FIFO not empty; 1: FIFO empty) FSS[4:0] Number of samples stored in the FIFO - 1 Table 42. Timer4 default values 00000000 Table 43. Timer3 default values 00000000 |
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