AN3027 datasheet(30/41 Pages) STMICROELECTRONICS

30 / 41 page

Designing a TM PFC

AN3027

30/41

Doc ID 16134 Rev 4

Note that in this design example of the 100 W board PFC, the tracking boost function has

not been used because the PFC has to supply a stable 400 V output voltage over the entire

input mains.

Pin 8 (PWM_LATCH): Output pin for fault signaling. During normal operation this pin

features high impedance. If a feedback failure is detected (PFC_OK > 2.5 V and INV+40 mV

< PFC_OK) the pin is asserted high. Normally, this pin is used to stop the operation of the

DC-DC converter supplied by the PFC pre-regulator by invoking a latched disable of its

PWM controller. If not used, the pin is left floating.

Pin 9 (PWM_STOP): Output pin for fault signaling. During normal operation this pin features

high impedance. If the IC is disabled by a voltage below 0.8 V on pin RUN (#10), the voltage

on the pin is pulled to ground. Normally, this pin is used to temporarily stop the operation of

the DC-DC converter supplied by the PFC pre-regulator by disabling its PWM controller. A

typical usage of this function is brownout protection in systems where the PFC pre-regulator

is the master stage. If not used, the pin is left floating.

Pin 12 (GND): This pin acts as the current return both for the signal internal circuitry and for

the gate drive current. When laying out the printed circuit board, these two paths should run

separately.

Pin 13 (GD): is the output of the driver. The pin is able to drive an external MOSFET with

600 mA source and 800 mA sink capability.

The high-level voltage of this pin is clamped at about 12 V to avoid excessive gate voltages

in case the pin is supplied with a high Vcc. To avoid undesired switch-on of the external

MOSFET because of some leakage current when the supply of the L6563S is below the

UVLO threshold, an internal pull-down circuit holds the pin low. The circuit guarantees 1.1 V

maximum on the pin (at Isink = 2 mA), with Vcc > VCC_ON. This allows omitting the “bleeder”

resistor connected between the gate and the source of the external MOSFET used for this

purpose.

Pin 14 (Vcc): is the supply of the device. This pin is externally connected to the startup

circuit (usually, one resistor connected to the rectified mains) and to the self-supply circuit.

Whatever the configuration of the self-supply system, a capacitor is connected between this

pin and ground.

To start the L6563S, the voltage must exceed the startup threshold (12 V typ.). Below this

value the device does not work and consumes less than 90 µA (typ.) from Vcc. This allows

the use of high value startup resistors (in the hundreds of k

Ω), which reduces power

consumption and optimizes system efficiency at low load, especially in wide-range mains

applications.

When operating, the current consumption (of the device only, not considering the gate drive

current) rises to a value depending on the operating conditions but never exceeding 6 mA.

The device keeps working as long as the supply voltage is over the UVLO threshold (13 V

max). If the Vcc voltage exceeds 22.5 V, an internal Zener diode, 20 mA rated, is activated in

order to clamp the voltage. Please remember that during normal operation the internal

Zener does not have to clamp the voltage, because in that case the power consumption of

the device increases considerably and its junction temperature increases too. The

suggested operating condition for safe operation of the device is below the minimum

clamping voltage of the pin.

AN3027 датащи(PDF) 30 Page - STMicroelectronics

AN3027 датащи(HTML) 30 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

датащи скачать

ссылки URL