AN3027 datasheet(25/41 Pages) STMICROELECTRONICS

25 / 41 page

AN3027

Designing a TM PFC

Doc ID 16134 Rev 4

25/41

In this way, in case of sudden line voltage rise, CFF is rapidly charged through the low

impedance of the internal diode and no appreciable overshoot is visible at the pre-

regulator's output. In case of a line voltage drop, an internal “mains drop” detector enables a

low impedance switch which suddenly discharges CFF avoiding long settling time before

reaching the new voltage level. Consequently an acceptably low steady-state ripple and low

current distortion can be achieved without any considerable undershoot or overshoot on the

preregulator's output like in systems with no feed-forward compensation.

Pin 10 (RUN): Remote ON/OFF control. A voltage below 0.8 V shuts down (does not latch)

the IC and brings its consumption to a considerably lower level. PWM_STOP is asserted

low. The IC restarts as the voltage at the pin goes above 0.88 V.

The brownout function can be easily implemented by connecting the RUN pin through a

divider to the VFF pin as shown in the Figure 14.

Figure 14.

Brownout function in L6563S and L6563H

The divider replaces the discharge resistor RFF shown in Figure 13. It should be selected in

order to have a similar time constant of

(16) but also to obtain the PFC startup at minimum

input mains voltage VACmin (in this design 90Vac) as specified in (1).

Thus, we can set:

Referring to

Figure 14 and considering the peak of the minimum input mains voltage, the

corresponding voltage on the VFF pin is:

Equation 52

∆V is the voltage drop between the VFF and MULT pins.

Now, considering the RUN pin enable threshold (0.88 V is the typical value given in the

datasheet), the RUN pin divider ratio can be calculated as follows:

(17)

CFF

multH

multL

START

∆

−

⋅

973

Vac

START

−

Ω

⋅

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