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AN3077 датащи(PDF) 53 Page - STMicroelectronics |
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AN3077 датащи(HTML) 53 Page - STMicroelectronics |
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53 / 82 page ![]() DocID16384 Rev 10 53/82 AN3077 Functional safety requirements for application software 81 The MPU implements a set of program-visible region descriptors that monitor all system bus addresses. The result is a hardware structure with a two-dimensional connection matrix, where the region descriptors represent one dimension and the individual system bus addresses and attributes represent the second dimension. Recommended: For ASIL D applications, the MPU should be used to ensure that only authorized software routines can configure modules and all other bus masters (eDMA, core, FlexRay) can access only their allocated resources according to their access rights. For the non-replicated master FlexRay, a correct MPU setup is highly recommended. 3.25 Register Protection Module The Register Protection module offers a mechanism to protect defined memory mapped address locations in a module that has been write protected. The address locations that can be protected are module specific. The Register Protection module includes these distinctive features: ● The Register Protection module restricts write accesses for the module under protection to supervisor mode only. This access restriction is in addition to any access restrictions imposed by the protected module. ● A register cannot be written once Soft Lock Protection is set. Soft Lock Protection can be cleared by software or system reset. ● A register cannot be written once Hard Lock Protection is set. Hard Lock Protection can only be cleared by system reset. Mandatory: For ASIL D applications, all configuration registers that aren’t modified during application execution, must be protected with a Hard Lock. Note: Rationale: Hard Lock is the last access protection against unwanted writes to some predefined memory mapped address locations. Mandatory: Access restrictions must be handled at MPU level. Note: Rationale: Access restriction at the MPU level is protection against unwanted read/write accesses to some predefined memory mapped address locations. Recommended: It is recommended that only hardware related software (OS, drivers) run in supervisor mode. Note: Implementation hint: Most of the off-platform peripherals have their own Register Protection module. Register Protection address space is inside the memory space reserved for the peripherals (please, refer to the “Device_Number registers under protection” section of the Device_Number Reference Manual). Each peripheral register that can be protected through the Register Protection module has a Set Soft Lock bit reserved in the Register Protection address space. This bit shall be asserted to enable the protection of the related peripheral registers. Moreover, the Hard Lock Bit (REG_PROT_GCR[HLB] = 1) should be set for best write protection. 3.26 Error Correction Status Module (ECSM) There is no dedicated ECC module on the Device_Number. ECC functionality is located in, or near, the different storage modules and may vary slightly depending on the needs (and size) of the storage. The ECSM is used to detect failures of data stored in memory (SRAM |
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