LXT970A datasheet(67/74 Pages) INTEL

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Dual-Speed Fast Ethernet Transceiver — LXT970A

Datasheet

Table 49. Auto Negotiation Advertisement Register (Address 4)

Bit

Name

Description

Type 1

Default

4.15

Not Supported

4.14

Reserved

Ignore on read.

4.13

Remote Fault

1 = Remote fault.

0 = No remote fault.

R/W

4.12:11

Reserved

Ignore on read.

R/W

4.10

Pause

1 = Pause operation is enabled for full-duplex links.

0 = Pause operation is disabled.

R/W

4.9

100BASE-T4

1 = 100BASE-T4 capability is available.

0 = 100BASE-T4 capability is not available.

(The LXT970A does not support 100BASE-T4, but allows this bit to be set

to advertise in the Auto-Negotiation sequence for 100BASE-T4 operation.

An external 100BASE-T4 transceiver could be switched in if this capability

is desired.)

R/W

4.8

100BASE-TX

full-duplex

1 = DTE is 100BASE-TX full-duplex capable.

0 = DTE is not 100BASE-TX full-duplex capable.

R/W

Note 2

4.7

100BASE-TX

1 = DTE is 100BASE-TX capable.

0 = DTE is not 100BASE-TX capable.

R/W

Note 3

4.6

10BASE-T

full-duplex

1 = DTE is 10BASE-T full-duplex capable.

0 = DTE is not 10BASE-T full-duplex capable.

R/W

Note 4

4.5

10BASE-T

1 = DTE is 10BASE-T capable.

0 = DTE is not 10BASE-T capable.

R/W

Note 5

4.4:0

Selector Field,

S<4:0>

<00001> = IEEE 802.3

<00010> = IEEE 802.9 ISLAN-16T

<00000> = Reserved for future Auto-Negotiation development

<11111> = Reserved for future Auto-Negotiation development

Unspecified or reserved combinations should not be transmitted.

R/W

00001

1. R/W = Read/Write

RO = Read Only

2. The default value of bit 4.8 is determined by pin FDE AND’ed with pin MF4.

3. The default value of bit 4.7 is determined by pin MF4.

4. The default value of bit 4.6 is determined by pin FDE AND’ed with pin CFG1.

5. The default value of bit 4.5 is determined by pin CFG1.

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