LXT970A datasheet(6/74 Pages) INTEL

6 / 74 page

LXT970A — Dual-Speed Fast Ethernet Transceiver

Datasheet

Tables

LXT970A Power Supply Signal Descriptions ...................................................... 10

LXT970A MII Signal Descriptions ....................................................................... 11

LXT970A Fiber Interface Signal Descriptions ..................................................... 12

LXT970A Twisted-Pair Interface Signal Descriptions ......................................... 13

LXT970A LED Indicator Signal Descriptions....................................................... 13

LXT970A Miscellaneous Signal Descriptions...................................................... 13

LXT970A Hardware Control Interface Signal Descriptions ................................. 14

MF Pin Function Settings1, 3 .............................................................................. 16

LXT970A Auto-Negotiation Operating Speed/Full-Duplex

Advertisement Settings ....................................................................................... 17

Test Loopback Operation .................................................................................... 23

Carrier Sense, Loopback, and Collision Conditions............................................ 23

Configuring the LXT970A via Hardware Control ................................................. 26

LXT970A Operating Configurations / Auto-Negotiation Enabled ........................ 26

LXT970A Operating Configurations / Auto-Negotiation Disabled ....................... 27

Mode Control Settings......................................................................................... 29

LXT970A Status using FDS/LED Pins ................................................................ 32

4B/5B Coding ...................................................................................................... 34

Magnetics Requirements .................................................................................... 41

Crystal Requirements.......................................................................................... 41

Crystal Component Manufacturers ..................................................................... 41

Absolute Maximum Ratings ................................................................................ 47

Operating Conditions .......................................................................................... 47

Digital I/O Characteristics1.................................................................................. 48

Digital I/O Characteristics - MultiFunction Pins MF<4:0>.................................... 48

Required Clock Characteristics........................................................................... 48

Low Voltage Fault Detect Characteristics ........................................................... 49

100BASE-TX Transceiver Characteristics .......................................................... 49

100BASE-FX Transceiver Characteristics .......................................................... 49

10BASE-T Transceiver Characteristics............................................................... 50

10BASE-T Link Integrity Timing Characteristics ................................................. 50

MII - 100BASE-TX Receive Timing Parameters / 4B Mode ................................ 51

MII - 100BASE-TX Transmit Timing Parameters / 4B Mode ............................... 52

MII - 100BASE-TX Receive Timing Parameters / 5B Mode ................................ 53

MII - 100BASE-TX Transmit Timing Parameters / 5B Mode ............................... 54

MII - 100BASE-FX Receive Timing Parameters / 4B Mode ................................ 55

MII - 100BASE-FX Transmit Timing Parameters / 4B Mode ............................... 56

MII - 10BASE-T Receive Timing Parameters...................................................... 57

MII - 10BASE-T Transmit Timing Parameters..................................................... 58

10BASE-T SQE (Heartbeat) Timing Parameters ................................................ 59

10BASE-T Jab and Unjab Timing Parameters.................................................... 59

Auto Negotiation and Fast Link Pulse Timing Parameters.................................. 60

MDIO Timing Parameters ................................................................................... 61

Power-Down Recovery Timing Parameters ........................................................ 62

Control Register (Address 0)............................................................................... 64

Status Register (Address 1) ................................................................................ 65

PHY Identification Register 1 (Address 2)........................................................... 66

PHY Identification Register 2 (Address 3)........................................................... 66

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