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L6717 датащи(PDF) 51 Page - STMicroelectronics

номер детали L6717
подробное описание детали  High-efficiency hybrid AM2r2 controller with I2C interface and embedded drivers
PDF  56 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6717 датащи(HTML) 51 Page - STMicroelectronics

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L6717
LTB Technology®
Doc ID 17326 Rev 1
51/56
12
LTB Technology®
LTB Technology® further enhances the performances of dual-edge asynchronous systems
by reducing the system latencies and immediately turning ON all the phases to provide the
correct amount of energy to the load. By properly designing the LTB network as well as the
LTB gain, the undershoot and the ring-back can be minimized also optimizing the output
capacitors count. LTB Technology® applies only to the CORE section.
LTB Technology® monitors the output voltage through a dedicated pin detecting Load-
Transients with selected dV/dt, it cancels the interleaved phase-shift, turning-on
simultaneously all phases. it then implements a parallel, independent loop that reacts to
load-transients bypassing E/A latencies.
LTB Technology® control loop is reported in Figure 19.
Figure 19.
LTB Technology® control loop (CORE section)
The LTB detector is able to detect output load transients by coupling the output voltage
through an RLTB - CLTB network. After detecting a load transient, the LTB Ramp is reset and
then compared with the COMP pin level. The resulting duty-cycle programmed is then OR-
ed with the PWMx signal of each phase by-passing the main control loop. All the phases will
then be turned-on together and the EA latencies results bypassed as well.
Sensitivity of the load transient detector can be programmed in order to control precisely
both the undershoot and the ring-back.
RLTB - CLTB is designed according to the output voltage deviation dVOUT which is desired the
controller to be sensitive as follow:
LTB Technology® design tips.
Decrease RLTB to increase the system sensitivity making the system sensitive to
smaller dVOUT.
Increase CLTB to increase the system sensitivity making the system sensitive to
higher dV/dt.
Ref
FB
COMP
VSEN
PWM
L/N
ESR
CO
d VCOMP
VOUT
ZF(s)
ZFB(s)
VID
Monitor
RLTB
CLTB
PWM_BOOST
LTB Ramp
LTB
LT Detect
LT Detect
R
LTB
dV
OUT
25
μA
------------------
=
C
LTB
1
2
π NR
LTB
F
SW
⋅⋅
--------------------------------------------------
=



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