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L6717 датащи(PDF) 8 Page - STMicroelectronics

номер детали L6717
подробное описание детали  High-efficiency hybrid AM2r2 controller with I2C interface and embedded drivers
PDF  56 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6717 датащи(HTML) 8 Page - STMicroelectronics

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Pins description and connection diagrams
L6717
8/56
Doc ID 17326 Rev 1
2
Pins description and connection diagrams
Figure 5.
Pins connection (Top view)
2.1
Pin descriptions
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
36 35 34 33 32 31 302928 27 26 25
12
3
4567
8
9 101112
CS1P
CS1N
CS2P
CS2N
CS3P
CS3N
CS4P
CS4N
ILIM
NB_CSP
NB_CSN
OSC / EN /FLT
BOOT1
UGATE1
PHASE1
LGATE1
LGATE2
NB_LGATE
VCCDRV
PHASE2
UGATE2
BOOT2
NB_PHASE
NB_UGATE
L6717
PAD (GND)
Table 2.
Pin description
Pin#
Name
Function
1PWROK
System-wide Power Good input (Ignored in PVI mode).
Internally pulled-low by 10
μA. When low, the device will decode the two SVI bits SVC
and SVD to determine the Pre-PWROK Metal VID. When high, the device will actively
run the SVI protocol.
Pre-PWROK Metal VID are latched after EN is asserted and re-used in case of
PWROK de-assertion. Latch is reset by VCC or EN cycle.
2SGND
Device signal ground.
All the internal references are referred to this pin. Connect to the PCB signal ground.
3VCC
Device power supply.
Operative voltage is 12 ±15%. Filter with 1
μF MLCC to SGND.
Do not connect VCC to any voltage greater than VCCDR.
4
COMP
CORE error amplifier output.
Connect with an RF - CF to FB.
The CORE section and/or the device cannot be disabled by grounding this pin.



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