поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

W25X05CLZPIG датащи(PDF) 20 Page - Winbond

номер детали W25X05CLZPIG
подробное описание детали  2.5 / 3 / 3.3 V 512K / 1M / 2M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL I/O SPI
PDF  51 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  WINBOND [Winbond]
домашняя страница  http://www.winbond.com
Logo WINBOND - Winbond

W25X05CLZPIG датащи(HTML) 20 Page - Winbond

Back Button W25X05CLZPIG Datasheet HTML 16Page - Winbond W25X05CLZPIG Datasheet HTML 17Page - Winbond W25X05CLZPIG Datasheet HTML 18Page - Winbond W25X05CLZPIG Datasheet HTML 19Page - Winbond W25X05CLZPIG Datasheet HTML 20Page - Winbond W25X05CLZPIG Datasheet HTML 21Page - Winbond W25X05CLZPIG Datasheet HTML 22Page - Winbond W25X05CLZPIG Datasheet HTML 23Page - Winbond W25X05CLZPIG Datasheet HTML 24Page - Winbond Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 51 page
background image
W25X05CL/10CL/20CL
Publication Release Date: March 23, 2012
- 20 -
Revision B
8.2.10 Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction
except that data is output on two pins, IO0 and IO1. This allows data to be transferred from the
W25X05CL/10CL/20CL at twice the rate of standard SPI devices. The Fast Read Dual Output
instruction is ideal for quickly downloading code from Flash to RAM upon power-up or for applications
that cache code-segments to RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of FR (see AC Electrical Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24-bit address as shown in figure 11. The dummy clocks allow the device's
internal circuits additional time for setting up the initial address. The input data during the dummy
clocks is “don’t care”. However, the IO
0 pin should be high-impedance prior to the falling edge of the
first data out clock.
Figure 11. Fast Read Dual Output Instruction Sequence Diagram
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (3Bh)
High Impedance
8
9
10
28
29
30
32
33
34
35
36
37
38
39
6
4
2
0
24-Bit Address
23
22
21
3
2
1
0
*
*
31
31
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Dummy Clocks
0
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
7
5
3
1
High Impedance
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
IO
0 switches from
Input to Output
6
7
Data Out 1
* Data Out 2
* Data Out 3
* Data Out 4
= MSB
*



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com