W25X05CLZPIG datasheet(11/51 Pages) WINBOND

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W25X05CL/10CL/20CL

Publication Release Date: March 23, 2012

- 11 -

Revision B

8.1.5 Reserved Bits

Status register bit location S6 and S4 are reserved for future use. Current devices will read 0 for this

bit location. It is recommended to mask out the reserved bit when testing the Status Register. Doing

this will ensure compatibility with future devices.

8.1.6 Status Register Protect (SRP)

The Status Register Protect (SRP) bit is a non-volatile read/write bit in status register (S7) that can be

used in conjunction with the Write Protect (/WP) pin to disable writes to status register. When the SRP

bit is set to a 0 state (factory default) the /WP pin has no control over status register. When the SRP

pin is set to a 1, the Write Status Register instruction is locked out while the /WP pin is low. When the

/WP pin is high the Write Status Register instruction is allowed.

SRP

/WP

Status

Description

Software

Protection

/WP pin has no control, The Status register can be written to

after a Write Enable instruction WEL = 1. [Factory Default]

Hardware

Protected

When /WP pin is low the Status Register locked and can

’t be

written to.

Hardware

Unprotected

When /WP pin is high the status register is unlocked and can

be written to after a Write Enable instruction WEL = 1.

SRP

BP 1

BP0

WEL

BUSY

WRITE ENABLE LATCH

ERASE/WRITE IN PROGRESS

BLOCK PROTECT BITS

STATUS REGISTER PROTECT

(Non-volatile)

(volatile)

(R)

(Non-volatile)

TOP/BOTTOM PROTECT

(Non-volatile)

RESERVED

(volatile)

Figure 3. Status Register Bit Locations

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