W25X05CLZPIG datasheet(13/51 Pages) WINBOND

13 / 51 page

W25X05CL/10CL/20CL

Publication Release Date: March 23, 2012

- 13 -

Revision B

8.2

INSTRUCTIONS

The instruction set of the W25X05CL/10CL/20CL consists of twenty basic instructions that are fully

controlled through the SPI bus (see Instruction Set table). Instructions are initiated with the falling

edge of Chip Select (/CS). The first byte of data clocked into the DIO input provides the instruction

code. Data on the DIO input is sampled on the rising edge of clock with most significant bit (MSB) first.

Instructions vary in length from a single byte to several bytes and may be followed by address bytes,

data bytes, dummy bytes (don’t care), and in some cases, a combination. Instructions are completed

with the rising edge of edge /CS. Clock relative timing diagrams for each instruction are included in

figures 4 through 25. All read instructions can be completed after any clocked bit. However, all

instructions that Write, Program or Erase must complete on a byte boundary (CS driven high after a

full 8-bits have been clocked) otherwise the instruction will be terminated. This feature further protects

the device from inadvertent writes. Additionally, while the memory is being programmed or erased, or

when the Status Register is being written, all instructions except for Read Status Register will be

ignored until the program or erase cycle has completed.

8.2.1 Manufacturer and Device Identification

MANUFACTURER ID

(M7-M0)

Winbond Serial Flash

EFh

Device ID

(ID7-ID0)

(ID15-ID0)

Instruction

ABh, 90h, 92h

9Fh

W25X05CL

05h

3010h

W25X10CL

10h

3011h

W25X20CL

11h

3012h

W25X05CLZPIG датащи(PDF) 13 Page - Winbond