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MCP6S92 датащи(PDF) 17 Page - Microchip Technology

номер детали MCP6S92
подробное описание детали  Single-Ended, Rail-to-Rail I/O, Low-Gain PGA
PDF  40 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP6S92 датащи(HTML) 17 Page - Microchip Technology

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 2004 Microchip Technology Inc.
DS21908A-page 17
MCP6S91/2/3
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
3.1
Analog Output
The output pin (VOUT) is a low-impedance voltage
source. The selected gain (G), selected input (CH0,
CH1) and voltage at VREF determine its value.
3.2
Analog Inputs (CH0, CH1)
The inputs CH0 and CH1 connect to the signal
sources. They are high-impedance CMOS inputs with
low bias currents. The internal MUX selects which one
is amplified to the output.
3.3
External Reference Voltage (VREF)
The VREF pin, which is an analog input, should be at a
voltage between VSS and VDD (the MCP6S92 has
VREF tied internally to VSS). The voltage at this pin
shifts the output voltage.
3.4
Power Supply (VSS and VDD)
The Positive Power Supply Pin (VDD) is 2.5V to 5.5V
higher than the Negative Power Supply Pin (VSS). For
normal operation, the other pins are at voltages
between VSS and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need a local bypass capacitor (typically 0.01 µF to
0.1 µF) within 2 mm of the VDD pin. These parts can
share a bulk capacitor with analog parts (typically
2.2 µF to 10 µF) within 100 mm of the VDD pin.
3.5
Digital Inputs
The SPI interface inputs are: Chip Select (CS), Serial
Input (SI) and Serial Clock (SCK). These are Schmitt-
triggered, CMOS logic inputs.
3.6
Digital Output
The MCP6S93 device has a SPI interface Serial Output
(SO) pin. This is a CMOS push-pull output and does
not ever go High-Z. Once the device is deselected (CS
goes high), SO is forced low. This feature supports
daisy-chaining, as explained in Section 5.3 “Daisy-
Chain Configuration”.
MCP6S91
MCP6S92
MCP6S93
Symbol
Description
11
1
VOUT
Analog Output
2
2
2
CH0
Analog Input
3
3
CH1
Analog Input
3—4
VREF
External Reference Pin
44
5
VSS
Negative Power Supply
55
6
CS
SPI™ Chip Select
6
6
7
SI
SPI Serial Data Input
8
SO
SPI Serial Data Output
7
7
9
SCK
SPI Clock Input
88
10
VDD
Positive Power Supply



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