MCP6S92 datasheet(9/40 Pages) MICROCHIP

9 / 40 page

 2004 Microchip Technology Inc.

DS21908A-page 9

MCP6S91/2/3

FIGURE 1-6:

Output Voltage Model with

the standard condition VREF =VSS =0V.

1.1.3

OUTPUT NON-LINEARITY

Figure 1-7 shows the Integral Non-Linearity (INL) of the

output voltage.

EQUATION 1-5:

The output non-linearity specification in the Electrical

Specifications (with units of: % of FSR) is related to

Figure 1-7 by:

EQUATION 1-6:

The Full-Scale Range (FSR) is VDD – 0.6V

(0.3V to VDD – 0.3V).

FIGURE 1-7:

Output Voltage INL with the

standard condition VREF =VSS =0 V.

1.1.4

DIFFERENT VREF CONDITIONS

Some of the plots in Section 2.0 “Typical Performance

Curves”,

have

the

conditions

VREF =VDD/2 or

VREF =VDD. The equations and figures above are easily

modified for these conditions. The ideal VOUT equation

becomes:

EQUATION 1-7:

The complete linear model is:

EQUATION 1-8:

where the new VIN end points are:

EQUATION 1-9:

The equations for extracting the specifications do not

change.

0.3

VDD – 0.3

VDD

VOUT (V)

VIN (V)

0.3

VDD – 0.3 VDD

INL

OUT

O_LIN

–

ONL

max V

3 V4

()

0.6V

–

------------------------------- 100%

⋅

INL (V)

VIN (V)

0.3

VDD – 0.3 VDD

O_ID

REF

–

()

REF

≥

ON_LIN

() V

IN_L

–

() 0.3V

REF

IN_L

0.3V

REF

–

------------------------------

REF

IN_H

0.3V

–

REF

–

-----------------------------------------------

REF

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