AM3703CUS datasheet(236/280 Pages) TI

236 / 280 page

SWPS038-081

hsusbx_clk

hsusbx_stp

hsusbx_dir

and

hsusbx_nxt

hsusbx_data[7:0]

Data_OUT

Data_IN

HSU1

HSU0

HSU1

HSU4

HSU2

HSU6

HSU3

HSU5

AM3715, AM3703

SPRS616F

– JUNE 2010 – REVISED AUGUST 2011

www.ti.com

Table 6-95. HSUSB1 and HSUSB2 Timing Requirements

—12-bit Master Mode(1) (2) (continued)

NO.

PARAMETER

OPP100

UNIT

MIN

MAX

HSU6

th(clkH-dV)

Hold time, input data hsusbx_data[7:0] valid after output clock

–0.52

hsusbx_clk rising edge

(1) In hsusbx, x is equal to 1 or 2.

(2) See Section 4.3.4, Processor Clocks.

Table 6-96. HSUSB1 and HSUSB2 Switching Characteristics

—12-bit Master Mode(1) (3)

NO.

PARAMETER

OPP100

UNIT

MIN

MAX

HSU0

fp(clk)

Frequency, output clock hsusbx_clk

MHz

tJ(clk)

Jitter standard deviation(2), output clock hsusbx_clk

400

HSU1

td(clkH-stpV)

Delay time, output clock hsusbx_clk rising edge to output stop signal

12.81

hsusbx_stp valid

td(clkH-stpIV)

Delay time, output clock hsusbx_clk rising edge to output stop signal

1.95

hsusbx_stp invalid

HSU2

td(clkH-dV)

Delay time, output clock hsusbx_clk rising edge to output data

12.81

hsusbx_data[7:0] valid

td(clkH-dIV)

Delay time, output clock hsusbx_clk rising edge to output data

1.95

hsusbx_data[7:0] invalid

tR(d)

Rise time, output data hsusbx_data[7:0]

tF(d)

Fall time, output data hsusbx_data[7:0]

(1) In hsusbx, x is equal to 1 or 2.

(2) The jitter probability density can be approximated by a Gaussian function.

(3) See Section 4.3.4, Processor Clocks.

(1)

In hsusbx, x is equal to 1 or 2.

Figure 6-52. HSUSB1 and HSUSB2

—12-bit Master Mode

6.6.5

Inter-Integrated Circuit Interface (I

2C)

NOTE

For more information, see Multimaster High-Speed I2C Controller chapter of the AM/DM37x

Multimedia Device Technical Reference Manual (literature number SPRUGN4).

The multi-master I2C peripheral provides an interface between two or more devices via an I2C serial bus.

236

Timing Requirements and Switching Characteristics

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