STM8L052C6 datasheet(17/102 Pages) STMICROELECTRONICS

17 / 102 page

STM8L052C6

Functional overview

Doc ID 023331 Rev 1

17/102

Figure 2.

Medium density value line STM8L05xxx clock tree diagram

The HSE clock source can be either an external crystal/ceramic resonator or an external source (HSE

bypass). Refer to Section HSE clock in the STM8L15x and STM8L16x reference manual (RM0031).

The LSE clock source can be either an external crystal/ceramic resonator or a external source (LSE

bypass). Refer to Section LSE clock in the STM8L15x and STM8L16x reference manual (RM0031).

3.5

Low power real-time clock

The real-time clock (RTC) is an independent binary coded decimal (BCD) timer/counter.

Six byte locations contain the second, minute, hour (12/24 hour), week day, date, month,

year, in BCD (binary coded decimal) format. Correction for 28, 29 (leap year), 30, and 31

day months are made automatically.

It provides a programmable alarm and programmable periodic interrupts with wakeup from

Halt capability.

●

Periodic wakeup time using the 32.768 kHz LSE with the lowest resolution (of 61 µs) is

from min. 122 µs to max. 3.9 s. With a different resolution, the wakeup time can reach

36 hours.

●

Periodic alarms based on the calendar can also be generated from every second to

every year.

HSE OSC

1-16 MHz

HSI RC

16 MHz

LSI RC

38 k Hz

LSE OSC

32 768 kHz

HSI

LSI

RTC

prescaler

/1;2;4;8;16;32;64

PCLK

to peripherals

RTCCLK/2

to LCD

to IWDG

SYSCLK

HSE (1)

(2)

LSI

LSE

OSC_OUT

OSC32_OUT

OSC_IN

OSC32_IN

clock output

CCO

prescaler

/1;2;4;8;16;32;64

HSI

LSI

HSE

LSE

CCO

to core and

memory

SYSCLK

Prescaler

/1;2;4;8;16;32;64;128

IWDGCLK

RTCSEL[3:0]

LSE (2)

CLKBEEPSEL[1:0]

to BEEP

BEEPCLK

CSS

configurable

/ 2

Peripheral

Clock enable (15 bits)

to RTC

RTCCLK

clock enable (1 bit)

LCDCLK

to LCD

SYSCLK

Halt

clock enable (1 bit)

LCD peripheral

RTCCLK

LCD peripheral

(1)

(2)

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