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AD9920ABBCZ датащи(PDF) 91 Page - Analog Devices

номер детали AD9920ABBCZ
подробное описание детали  12-Bit CCD Signal Processor with V-Driver and Precision Timing Generator
PDF  112 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9920ABBCZ датащи(HTML) 91 Page - Analog Devices

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AD9920A
Rev. B | Page 91 of 112
0.1µF
25V
1.0µF
25V
0.1µF
10V
4.7µF
10V
4.7µF
6.3V
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
EXTERNAL RESET IN
IOVDD
IOVSS
DVSS
(LSB) D0
D1
D2
D3
D4
D5
D6
CLIVDD
TCVSS
RGVSS
D7
D8
H4
H3
H2
H1
LDOIN
LDOOUT
6
GENERAL-PURPOSE OUTPUTS
NOTE: ONE GPO IS NEEDED TO DRIVE VDR_EN (PIN B11)
19
3
12
DATA OUTPUTS
DCLK OUTPUT
H1, H2 TO CCD
H3, H4 TO CCD
+3V CLI SUPPLY
H7, H8 TO CCD
H5, H6 TO CCD
SERIAL INTERFACE
(FROM ASIC/DSP)
ANALOG OUTPUT FROM CCD
RG TO CCD
HL TO CCD
AD9920A
NOT DRAWN TO SCALE
VERTICAL SYNC IN/OUT
HORIZONTAL SYNC IN/OUT
0.1uF
+3V SUPPLY
VH SUPPLY
VL SUPPLY
SUBCK OUTPUT (TO CCD)
VERTICAL OUTPUT (TO CCD)
+3V SUPPLY
XSUBCNT INPUT (FROM GPO OR TIE TO +3V)
NC
NC
NC
NC
DVDD
+1.8V SUPPLY
+3V H, RG SUPPLY
AVDD
TCVDD
RGVDD
HVDD1
HVDD2
HVSS2
HVSS1
VDR_EN
DRVDD
MASTER CLOCK INPUT (3V LOGIC)
OPTIONAL CLOCK OSCILLATOR OUTPUT
(FOR CRYSTAL APPLICATION)
NC
H6
H5
NC
GPO OUTPUT
DRVSS/LDOVSS
L6
A10
A9
L5
K6
K4
A2
B2
E1
G1
E2
G2
L3
K3
B1
C1
H11
G11
B11
B9
C6
C7
A8
A7
B7
B6
A6
A5
D1
D2
F1
F2
H1
H2
A1
A11
L1
L11
B8
B10
AVSS
CCDGND
AVSS
HVSS2
J2
HVDD2
J1
J7
K7
K8
VDVSS
C10
(TIE TO IOVDD IF RESET IS NOT USED)
J10
NC
+3V
SRSW
SRCTL
C9
C2
J6
GPO OUTPUT
(OR GND, IF NOT USED)
ANALOG CONTROL INPUT
(OR GND, IF NOT USED)
LEGEN
Figure 111. Typical 1.8 V Circuit Configuration in 19-Channel Mode



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