MPC8536DS datasheet(58/126 Pages) FREESCALE

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MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5

Electrical Characteristics

Freescale Semiconductor

2.9.3.4

SGMII AC Timing Specifications

This section describes the SGMII transmit and receive AC timing specifications. Transmitter and receiver characteristics are

measured at the transmitter outputs (SD2_TX[n] and SD2_TX[n]) or at the receiver inputs (SD2_RX[n] and SD2_RX[n]) as

depicted in Figure 32 respectively.

2.9.3.4.1

SGMII Transmit AC Timing Specifications

This table provides the SGMII transmit AC timing targets. A source synchronous clock is not provided.

Receiver differential input impedance

ZRX_DIFF

100

120

—

Receiver common mode input

impedance

ZRX_CM

—

Common mode input voltage

VCM

—Vxcorevss

—V

Notes:

1. Input must be externally AC-coupled.

2. VRX_DIFFp-p is also referred to as peak to peak input differential voltage

3. The concept of this parameter is equivalent to the Electrical Idle Detect Threshold parameter in PCI Express. See Table 72

for further explanation.

4. The LSTS shown in the table refers to the LSTSA or LSTSE bit field of chip’s SerDes 2 control register.

5. VCM_ACp-p is also referred to as peak to peak AC common mode voltage.

6. On-chip termination to S2GND (xcorevss).

Table 41. SGMII Transmit AC Timing Specifications

At recommended operating conditions with X2VDD = 1.0V ± 5%.

Parameter

Symbol

Min

Typ

Max

Unit

Notes

Deterministic Jitter

—

0.17

UI p-p

—

Total Jitter

—

0.35

UI p-p

—

Unit Interval

799.92

800

800.08

VOD fall time (80%-20%)

tfall

—

120

—

VOD rise time (20%-80%)

trise

—

120

—

Notes:

1. Each UI is 800 ps ± 100 ppm.

Table 40. SGMII DC Receiver Electrical Characteristics (continued)

Parameter

Symbol

Min

Typ

Max

Unit

Notes

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