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LCMXO2-640ZE-3TG100C датащи(PDF) 54 Page - Lattice Semiconductor

номер детали LCMXO2-640ZE-3TG100C
подробное описание детали  MachXO2??Family Data Sheet
PDF  106 Pages
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производитель  LATTICE [Lattice Semiconductor]
домашняя страница  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LCMXO2-640ZE-3TG100C датащи(HTML) 54 Page - Lattice Semiconductor

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3-15
DC and Switching Characteristics
MachXO2 Family Data Sheet
Typical Building Block Function Performance – ZE Devices
1
Pin-to-Pin Performance (LVCMOS25 12mA Drive)
Register-to-Register Performance
Derating Logic Timing
Logic timing provided in the following sections of the data sheet and the Lattice design tools are worst case num-
bers in the operating range. Actual delays may be much faster. Lattice design tools can provide logic timing num-
bers at a particular temperature and voltage.
Function
-3 Timing
Units
Basic Functions
16-bit decoder
13.9
ns
4:1 MUX
10.9
ns
16:1 MUX
12.0
ns
Function
-3 Timing
Units
Basic Functions
16:1 MUX
191
MHz
16-bit adder
134
MHz
16-bit counter
148
MHz
64-bit counter
77
MHz
Embedded Memory Functions
1024x9 True-Dual Port RAM
(Write Through or Normal, EBR output registers)
90
MHz
Distributed Memory Functions
16x4 Pseudo-Dual Port RAM (one PFU)
214
MHz
1. The above timing numbers are generated using the Diamond design tool. Exact performance may vary
with device and tool version. The tool uses internal parameters that have been characterized but are not
tested on every device.



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