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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8311 датащи(PDF) 23 Page - Wolfson Microelectronics plc |
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WM8311 датащи(HTML) 23 Page - Wolfson Microelectronics plc |
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23 / 302 page  Pre-Production WM8311 w PP, May 2012, Rev 3.1 23 PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Load Regulation VOUT LOAD ILOAD = 100µA to 10mA 0.2 %/mA Quiescent Current IQ No load 2.5 A Start-up time tstart_up No load, Output cap 0.1 µF, 90% of VOUT 0.3 1 ms Shutdown time tshut_down No load, Output cap 0.1 µF, 10% of VOUT 0.3 1 ms 7.5 RESET THRESHOLDS Unless otherwise noted: TJ = -40°C to +125°C; Typical values are at TJ = +25ºC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Power On Reset Power on Reset threshold VPMIC (LDO12VOUT) voltage at which device transitions between NO POWER and BACKUP states VPOR, DE- ASSERT VPMIC rising 1.18 V VPOR, ASSERT VPMIC falling 1.08 V Power on Reset hysteresis VPOR, HYST 100 mV Device Reset Control Device Reset threshold VPMIC (LDO12VOUT) voltage at which device transitions between BACKUP and OFF states VRES, DE- ASSERT VPMIC rising 1.94 V VRES, ASSERT VPMIC falling 1.85 V Device Reset hysteresis VRES, HYST 92 mV Device Shutdown Shutdown threshold SYSVDD voltage at which the device forces an OFF transition VSHUTDOWN SYSVDD falling 2.7 V SYSLO threshold accuracy SYSVDD voltage at which SYSLO is asserted VSYSLO SYSVDD falling, VSYSLO set by SYSLO_THR (2.8V to 3.5V) -3.5 +3.5 % SYSOK threshold accuracy SYSVDD voltage at which SYSOK is asserted. VSYSOK SYSVDD rising, VSYSOK set by SYSOK_THR (2.8V to 3.5V) Note the SYSOK hysteresis margin (VSYSOK, HYST) is added to SYSOK_THR. -3.5 +3.5 % SYSOK hysteresis VSYSOK, HYST 40 mV 7.6 REFERENCES Unless otherwise noted: TJ = +25ºC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Voltage Reference VVREFC 0.8 V Current Reference VIREFR 100k to REFGND 0.5 V |
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