TUSB7320 datasheet(32/115 Pages) TI1

32 / 115 page

TUSB7320, TUSB7340

SLLSE76J – MARCH 2011 – REVISED MAY 2012

www.ti.com

4.6

Class Code and Revision ID Register

This read only register categorizes the Base Class, Sub Class, and Programming Interface of the

TUSB73X0. The Base Class is 0Ch, identifying the device as a Serial Bus Controller. The Sub Class is

03h, identifying the function as a Universal Serial Bus Host Controller, and the Programming Interface is

30h, identifying the function as a USB 3.0 xHCI Host Controller. Furthermore, the TI chip revision is

indicated in the lower byte (02h).

PCI register offset: 08h

Default value: 0C03 3002h

Table 4-8. PCI Register 06h

Bit

No.

Reset

State

Bit

No.

Reset

State

Table 4-9. Class Code and Revision ID Register Description

Bit

Field Name

Access

Description

Base Class. This field returns 0Ch when read, which classifies the function

31:24

BASECLASS

as a Serial Bus Controller.

Sub Class. This field returns 03h when read, which specifically classifies

23:16

SUBCLASS

the function as a Universal Serial Bus Host Controller.

Programming Interface. This field returns 30h when read, which identifies

15:8

PGMIF

the function as a USB 3.0 xHCI Host Controller.

Silicon Revision. This field returns the silicon revision of the function. This

7:0

CHIPREV

field is 02h.

4.7

Cache Line Size Register

This 8-bit register is read/write for legacy compatibility purposes and is not applicable to the functionality of

the TUSB73X0.

PCI register offset: 0Ch

Default value: 00h

Table 4-10. PCI Register 0Ch

Bit No.

Reset State

CLASSIC PCI CONFIGURATION SPACE

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Product Folder Link(s): TUSB7320 TUSB7340

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