HT45F43 datasheet(33/152 Pages) HOLTEK

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EEC Register

Bit

76543210

Name

¾¾¾¾

WREN

RDEN

R/W

¾¾¾¾

R/W

POR

¾¾¾¾

0000

Bit7~4

Unimplemented, read as

²0²

Bit 3

WREN: Data EEPROM Write Enable

0: Disable

1: Enable

This is the Data EEPROM Write Enable Bit which must be set high before Data EEPROM write

operations are carried out. Clearing this bit to zero will inhibit Data EEPROM write operations.

Bit 2

WR: EEPROM Write Control

0: Write cycle has finished

1: Activate a write cycle

This is the Data EEPROM Write Control Bit and when set high by the application program will

activate a write cycle. This bit will be automatically reset to zero by the hardware after the write

cycle has finished. Setting this bit high will have no effect if the WREN has not first been set high.

Bit 1

RDEN: Data EEPROM Read Enable

0: Disable

1: Enable

This is the Data EEPROM Read Enable Bit which must be set high before Data EEPROM read

operations are carried out. Clearing this bit to zero will inhibit Data EEPROM read operations.

Bit 0

RD: EEPROM Read Control

0: Read cycle has finished

1: Activate a read cycle

This is the Data EEPROM Read Control Bit and when set high by the application program will

activate a read cycle. This bit will be automatically reset to zero by the hardware after the read

cycle has finished. Setting this bit high will have no effect if the RDEN has not first been set high.

Note: The WREN, WR, RDEN and RD can not be set to

²1² at the same time in one instruction. The WR and RD can

not be set to

²1² at the same time.

Reading Data from the EEPROM

To read data from the EEPROM, the read enable bit, RDEN, in the EEC register must first be set high

to enable the read function. The EEPROM address of the data to be read must then be placed in the

EEA register. If the RD bit in the EEC register is now set high, a read cycle will be initiated. Setting the

RD bit high will not initiate a read operation if the RDEN bit has not been set. When the read cycle

terminates, the RD bit will be automatically cleared to zero, after which the data can be read from the

EED register. The data will remain in the EED register until another read or write operation is

executed. The application program can poll the RD bit to determine when the data is valid for reading.

Writing Data to the EEPROM

To write data to the EEPROM, the write enable bit, WREN, in the EEC register must first be set high to

enable the write function. The EEPROM address of the data to be written must then be placed in the

EEA register and the data placed in the EED register. If the WR bit in the EEC register is now set high,

an internal write cycle will then be initiated. Setting the WR bit high will not initiate a write cycle if the

WREN bit has not been set. As the EEPROM write cycle is controlled using an internal timer whose

operation is asynchronous to microcontroller system clock, a certain time will elapse before the data

will have been written into the EEPROM. Detecting when the write cycle has finished can be

implemented either by polling the WR bit in the EEC register or by using the EEPROM interrupt.

When the write cycle terminates, the WR bit will be automatically cleared to zero by the

microcontroller, informing the user that the data has been written to the EEPROM. The application

program can therefore poll the WR bit to determine when the write cycle has ended.

HT45F23/HT45F43

8-Bit Flash MCU with Op Amps & Comparators

Rev. 1.20

September 15, 2011

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