HT45F43 datasheet(93/152 Pages) HOLTEK

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Slave Address

The transmission of a START signal by the master will be detected by all devices on the I

2C bus. To

determine which slave device the master wishes to communicate with, the address of the slave device

will be sent out immediately following the START signal. All slave devices, after receiving this 7-bit

address data, will compare it with their own 7-bit slave address. If the address sent out by the master

matches the internal address of the microcontroller slave device, then an internal I

2C bus interrupt

signal will be generated. The next bit following the address, which is the 8th bit, defines the read/write

status and will be saved to the SRW bit of the SIMC1 register. The slave device will then transmit an

acknowledge bit, which is a low level, as the 9th bit. The slave device will also set the status flag

HAAS when the addresses match.

As an I

2C bus interrupt can come from two sources, when the program enters the interrupt subroutine,

the HAAS bit should be examined to see whether the interrupt source has come from a matching slave

address or from the completion of a data byte transfer. When a slave address is matched, the device

must be placed in either the transmit mode and then write data to the SIMD register, or in the receive

mode where it must implement a dummy read from the SIMD register to release the SCL line.

2C Bus Read/Write Signal

The SRW bit in the SIMC1 register defines whether the slave device wishes to read data from the I

bus or write data to the I

2C bus. The slave device should examine this bit to determine if it is to be a

transmitter or a receiver. If the SRW flag is

²1² then this indicates that the master device wishes to read

data from the I

2C bus, therefore the slave device must be setup to send data to the I2C bus as a

transmitter. If the SRW flag is

²0² then this indicates that the master wishes to send data to the I2C bus,

therefore the slave device must be setup to read data from the I

2C bus as a receiver.

2C Bus Slave Address Acknowledge Signal

After the master has transmitted a calling address, any slave device on the I

2C bus, whose own internal

address matches the calling address, must generate an acknowledge signal. The acknowledge signal

will inform the master that a slave device has accepted its calling address. If no acknowledge signal is

received by the master then a STOP signal must be transmitted by the master to end the

communication. When the HAAS flag is high, the addresses have matched and the slave device must

check the SRW flag to determine if it is to be a transmitter or a receiver. If the SRW flag is high, the

slave device should be setup to be a transmitter so the HTX bit in the SIMC1 register should be set to

²1². If the SRW flag is low, then the microcontroller slave device should be setup as a receiver and the

HTX bit in the SIMC1 register should be set to

²0².

2C Bus Data and Acknowledge Signal

The transmitted data is 8-bits wide and is transmitted after the slave device has acknowledged receipt

of its slave address. The order of serial bit transmission is the MSB first and the LSB last. After receipt

of 8-bits of data, the receiver must transmit an acknowledge signal, level

²0², before it can receive the

next data byte. If the slave transmitter does not receive an acknowledge bit signal from the master

receiver, then the slave transmitter will release the SDA line to allow the master to send a STOP signal

to release the I

2C Bus. The corresponding data will be stored in the SIMD register. If setup as a

transmitter, the slave device must first write the data to be transmitted into the SIMD register. If setup

as a receiver, the slave device must read the transmitted data from the SIMD register.

When the slave receiver receives the data byte, it must generate an acknowledge bit, known as TXAK,

on the 9th clock. The slave device, which is setup as a transmitter will check the RXAK bit in the

SIMC1 register to determine if it is to send another data byte, if not then it will release the SDA line and

await the receipt of a STOP signal from the master.

HT45F23/HT45F43

8-Bit Flash MCU with Op Amps & Comparators

Rev. 1.20

September 15, 2011

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