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HT45F43 датащи(PDF) 98 Page - Holtek Semiconductor Inc

номер детали HT45F43
подробное описание детали  8-Bit Flash MCU with Op Amps & Comparators
PDF  152 Pages
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производитель  HOLTEK [Holtek Semiconductor Inc]
домашняя страница  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT45F43 датащи(HTML) 98 Page - Holtek Semiconductor Inc

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LDO Function
The devices contain a low power voltage regulator implemented in CMOS technology. Using CMOS
technology ensures low voltage drop and low quiescent current. There are two fixed output voltages of
2.4V and 3.3V, which can be controlled by a specific register. The internal LDO output combined with
various options by register can provide a fixed voltage for the LCD bias voltage, the OPA reference
voltage, the ADC reference voltage and as a fixed power supply for external device.
LDO Control Register
Bit
76543210
Name
¾¾¾
VLOE
REN1
VRES
VSEL
LDOEN
R/W
¾¾¾
R/W
R/W
R/W
R/W
R/W
POR
¾¾¾
00000
Bit 7~5
unimplemented, read as
²0²
Bit 4
VLOE: LDO output voltage control bit
0: disable
1: enable
If the VLOE and LDOEN are set to
²1², the LDO will output 2.4V or 3.3V to pin and disable
I/O function.
Bit 3
REN1: Bias voltage divided resistor control bit
0: disable
1: enable
If the REN1is set to
²1², that will turn on the resistor DC path, which will generate bias voltage
for OPAs or LCD SCOM.
Bit 2
VRES: Divided resistor voltage supply selection bit
0: VDD
1: VLDO
Bit 1
VSEL: LDO output voltage selection bit
0: 2.4V
1: 3.3V
Bit 0
LDOEN: LDO control bit
0: disable
1: enable
Note: 1. The total resistance of the divided resistor, 500K or 200K, can be selected by the ISEL flag in LCDC
register.
2. To disable the LDO function will turn off the BUF1 as well, no matter the LDO output voltage control bit,
VLOE, is enabled or not.
3. If the LCD COM1 is enabled, COM1EN=1, then the VLOE flag will be forced to
²0² by hardware to disable
the LDO output ,in order to avoid the conflict with LCD COM1 bias voltage output.
4. If the LDO output is as the ADC reference voltage, then the VCAP should be connected a 0.1u capacitor to
ground.
5. If the LCDBUF is enabled, then the BUF2 will be turned on and the SW7 will be turned off.
6. If the LDO is disabled, LDOEN=0, then the SW4 will be turned to VDD, no matter VRES flag is
²1² or not.
Rev. 1.20
98
September 15, 2011
HT45F23/HT45F43
8-Bit Flash MCU with Op Amps & Comparators



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