ICS1532 datasheet(6/36 Pages) IDT

6 / 36 page

110 MHZ TRIPLE 8-BIT ADC WITH CLOCK GENERATOR

ICS1532

MDS 1532 G

Revision 060804

www.idt.com

2.0.1

Pin Listing by Functional Grouping

Table 2-1.

Pin Listing by Functional Group

Group

Name

Type

Pin Description

Pin #

Clock In

CLAMP

Input

External CLAMP input - Optional

Clock In

HSYNC

Input

Horizontal Sync Input

Clock In

XIN

Input

Crystal Input - Connect 14.31818 MHz, 20pF, parallel resonance

crystal or and external 14.31818-MHz clock source

106

Clock Out

ADCRCLK

Output

Analog-to-Digital Converter Reference Clock

• Half-rate pixel clock for latching digital output pixel data.

Clock Out

ADCSYNC

Output

Analog-to-Digital Converter Sync

• Recovered HSYNC output. Latch with ADCRCLK.

Clock Out

CLK

Output

Full Rate Pixel Clock to ADC Section

• Normally not used. See ADRCRCLK

114

Clock Out

MCLK

Output

Memory Clock - Independent user-programmable clock source #1

101

Clock Out

OSCOUT

Output

Oscillator Output - Native Oscillator or Divided Oscillator Output

113

Clock Out

PNLCLK

Output

Panel Clock - Independent user-programmable clock source #2

104

Clock Out

REF

Output

Reference - Various reference line clock sync signals.

112

Clock Out

XOUT

Output

Crystal Output - Connect to the crystal above or leave open

107

Control In

SCL

Input

Serial Clock for I2C - 5-V tolerant input clock from an I2C bus

137

Control In

SBADR

Input

I2C Serial Bus Address

– Low, address is 49h for reads and 48h for writes

– High, address is 4Bh for reads and 4Ah for writes

142

Control In

RESET

Input

RESET Input - Optional

– Low - Device held in RESET state

– High - Normal Operation -Pull high if unused

142

Control I/O SDA

I/O

Serial Data - 5-V tolerant pin data pin for an I2C bus

138

Control

Out

PSEL1 - 3

Output

Programmable Outputs

See Register 37h.

8, 9, 10

Analog

Input

BLUE,

GREEN,

RED

Input

Analog Blue, Green and Red Inputs

• Accepts analog data for the ADCs blue, green, and red converters

15,

19,

Analog

Input

ABLUE_R

AGREEN_R

ARED_R

Input

Analog Blue, Green and Red Signal Returns

• These pins provide a return path for the analog input data

16,

20,

Data

Output

BA7 – BA0,

GA7 – GA0,

RA7 – RA0

Output

Blue ‘A’ 7–0, Green ‘A’ 7–0, and Red ‘A’ 7–0.

• Output first blue, green, and red digital pixel data, respectively.

• A7 = MSB

See

Figure 2-1

Data

Output

BB7 – BB0,

GB7 – GB0,

RB7 – RB0

Output

Blue ‘B’ 7–0, Green ‘B’ 7–0, and Red ‘B’ 7–0.

• Outputs second blue, green, and red digital pixel data, respectively.

• A7 = MSB

See

Figure 2-1

Clock In

EXTFIL

Input

External Filter-Optional external filter input between self and XFILRET

144

Clock In

PDEN/COAST

Input +5 Phase-Detector Enable - Can disable the charge pump with Reg 0:1-0 141

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